Performance testing method of low power consumption chip

A test method and low power consumption technology, which is applied in the field of semiconductor manufacturing, can solve the problems of slow chip performance test speed, etc., and achieve the effect of improving test speed and good compatibility

Inactive Publication Date: 2013-04-24
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The problem solved by the present invention is to propose a performance testing method of a low-power chip to solve the problem that the chip performance testing rate is relatively slow caused by the existing power supply mode

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  • Performance testing method of low power consumption chip
  • Performance testing method of low power consumption chip
  • Performance testing method of low power consumption chip

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Embodiment Construction

[0028] As mentioned above, in the prior art, the power supply module is used to provide different power supply voltages for performance testing of the chip. The rising edge time of the power supply module is relatively long, usually tens to hundreds of microseconds, thus causing chip performance The test rate is slower. In view of the above problems, the present invention adopts a power supply mode of high and low levels, and the rising edge time of the high level in the high and low levels is relatively short, generally several nanoseconds to tens of nanoseconds, thus, the test rate can be improved, and for this The power supply mode of high and low levels generally provides the characteristics of small working current, and the technical solution of the present invention is aimed at the performance test of low power consumption chips.

[0029] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of ...

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Abstract

Compared with the prior art of adopting the scheme that a performance test is performed through different supply voltages supplied to a chip by a module with power supplied by a power source, a power supply mode of adopting high-low electrical level is adopted by the performance testing method of a low power consumption chip. Rising edge time of high electrical level in the high-low electrical level is short and usually lasts for several nanoseconds to tens of nanoseconds, and therefore a test rate is improved. Due to the characteristic that working current supplied by the power supply mode of the high-low electrical level is low, the method is used for the performance test of the low power consumption chip.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a performance testing method of a low-power consumption chip. Background technique [0002] Chips, such as flash memory (Flash), perform various performance tests on each memory unit after the production is completed, to determine whether the performance of each unit is qualified, and to make a list of faulty units. During the performance test process, it is necessary to test the working status of the chip under multiple power supply voltages. The power supply voltage in the existing chip performance test is powered by a power supply module (Device Power Supply, DPS), which is controlled by Controlled by the testing machine. [0003] For more information about the power supply module, please refer to the Chinese patent application with application publication number CN 102360064A. [0004] However, the power supply module for the set supply voltage, such as figure 1 ...

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Application Information

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IPC IPC(8): G01R31/28
Inventor 王磊
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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