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Buffering device used for improving voltage drive capability

A technology of voltage drive and buffer, applied in the direction of electrical components, logic circuits, pulse technology, etc., can solve problems such as circuit failure, achieve the effect of reducing current, reducing power consumption, and good stability

Inactive Publication Date: 2013-04-24
HUNAN CITY UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, when a voltage with low drive capability of 200mv drives a large load, the speed problem needs to be solved first. At this time, a buffer is needed to improve the drive capability of the voltage; when the voltage works in different environments, the output voltage Stability must also be fully guaranteed, otherwise it is easy to cause the circuit not to work properly, especially for low voltage

Method used

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  • Buffering device used for improving voltage drive capability
  • Buffering device used for improving voltage drive capability
  • Buffering device used for improving voltage drive capability

Examples

Experimental program
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Embodiment Construction

[0013] see figure 1 , the simple structure of the low-voltage high-stability high-speed buffer of the present invention is composed of four NMOS transistors MN1, MN2, MN3 and MN4, three PMOS transistors MP1, MP2 and MP3, and a resistor R.

[0014] The specific connection relationship is as follows, the drain of the NMOS transistor MN1 and the power supply V dd connected, the gate is connected to the external control signal V con , the body terminal is grounded to GND, and the source is connected to the source of the PMOS transistors MP1 and MP2; the gate of the PMOS transistor MP1 is connected to the external input signal V i , the body terminal is connected to the power supply V dd , the drain is connected to the drain and gate of the PMOS tube MN2 and the gate of the PMOS tube MN3; the two ends of the resistor R are set as the A and B terminals, and the gate of the PMOS tube MP2 is connected to the source of the NMOS tube MN4 and the resistor. The A terminal of R is conne...

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Abstract

A buffering device used for improving voltage drive capability comprises four N-channel metal oxide semiconductor (NMOS) pipes which are MN1, MN2, MN3 and MN4, three P-channel Metal Oxide Semiconductor (PMOS) pipes which are MP1, MP2 and MP3, and a resistance R. According to the buffering device used for improving the voltage drive capability, a differential amplifier and an output form a negative feedback, and therefore change of output voltage is very tiny along the change of environment. A PMPS pipe in the prior art of a current source of the buffering device is replaced by the MN1 and the MN4, current of the buffering device is effectively reduced and power consumption of the whole module is reduced. The resistance R is adopted, and therefore the input level of the buffering device is kept in a low level. The buffering device used for improving the voltage drive capability is simple in structure, strong in drive capability and at the same time capable of ensuring stability of the output voltage.

Description

technical field [0001] The invention relates to a high-speed buffer with low voltage and high stability with a simple structure, in particular to a buffer with driving capability that can improve low-voltage and low-driving signals. It can effectively improve the driving ability of low-voltage signals, and the output voltage has high stability. It is a high-speed buffer with excellent performance of low voltage and high stability. Background technique [0002] With the development of integrated circuit design technology, in the new generation of integrated circuit design, in order to achieve design goals, especially to reduce power consumption and increase speed, designers often use the multiple voltage (MSV) method to allow the use of different voltage designs. Sub-entities or blocks, and the introduction of low-voltage logic, in order to enhance the driving capability of low-voltage, it is necessary to add a first-stage buffer between the low-voltage and the load. For exa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/094
Inventor 杨格兰柏娜夏迎成朱贾峰
Owner HUNAN CITY UNIV