Information processing method and device

An information processing method and technology of an information processing device, which are applied in the fields of electrical digital data processing, image memory management, memory address/allocation/relocation, etc., can solve the problem of unsolved texture data and video pixel data cache, increase chip power consumption, etc. , occupying chip area and other issues, to achieve the effect of saving chip power consumption and chip area

Active Publication Date: 2013-05-01
GALAXYCORE SHANGHAI
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Problems solved by technology

[0005] However, the inventors found that: in the existing System-on-a-chip (SoC), video pixels and textures are usually stored separately, and it is necessary to configure an on-chip cache for video encoding and decoding, and configure another cache for 3D textures. An on-chip cache not only occupies the chip area, but also increases the power consumption of th

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Embodiment Construction

[0057] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0058] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the embodiments of the present invention in detail, for convenience of explanation, the schematic diagrams are only examples, which should not limit the protection scope of the present invention.

[0059] In order to solve the technical problems in the background technology, the inventors found that in the system chip, video codec and 3D graphics processing do not occur at the same time, taking a smart phone as an ex...

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Abstract

The invention discloses an information processing method and device. The information processing method comprises the steps of: stipulating a data organization form of video pixel data and graph texture data in a cache memory; acquiring the information of data to be read according to an external reading command, and determining a data type of the data to be read; determining missing data according to the information of the data to be read and mark information of the cache memory; reading in the missing data from an off-chip memory; and filling the missing data into the cache memory according to the data organization form. The information processing device comprises the cache memory and a microprocessor, wherein the cache memory is used for storing the video pixel data or the graph texture data; and the microprocessor is connected with the cache memory, an external processor and the off-chip memory, and is suitable for reading the missing data from the off-chip memory according to the external reading command sent by the external processor, and filling the missing data into the cache memory according to the specific data organization form. According to the invention, due to adoption of a multiplexing, the area of a chip is saved, and the power consumption of the chip is reduced.

Description

technical field [0001] The invention relates to the field of digital information processing, in particular to a reusable information processing method and device. Background technique [0002] During the development of computer technology, the access speed of memory has always been much slower than the processing speed of CPU, so that the high-speed processing capability of CPU cannot be fully utilized, affecting the work efficiency of the entire computer system. Cache memory is used to alleviate the speed mismatch between CPU and memory. The use of high-speed cache memory technology has been quite common. The high-speed cache memory is a first-level memory that exists between the memory and the CPU. It is composed of a static memory chip (SRAM) and has a relatively small capacity, but its access speed can match the CPU. According to the principle of program locality, there is a high probability that those units adjacent to a unit of memory being used will be used. Theref...

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Application Information

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IPC IPC(8): G06F12/08G06F12/0811G06T1/60
CPCY02B60/1225Y02D10/00
Inventor 兰军强朱磊沙力李济川
Owner GALAXYCORE SHANGHAI
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