Double data rate (DDR) 2 synchronous dynamic random access memory (SDRAM) controller

A technology for controllers and control registers, which is applied in the direction of instruments, electrical digital data processing, etc., and can solve the problems of not realizing the reordering function of read/write request commands, reducing bandwidth utilization, and low bandwidth utilization.

Active Publication Date: 2013-05-08
OMNIVISION TECH (SHANGHAI) CO LTD
View PDF3 Cites 14 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] (2) Lower bandwidth utilization
Reduced bandwidth utilization i

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Double data rate (DDR) 2 synchronous dynamic random access memory (SDRAM) controller
  • Double data rate (DDR) 2 synchronous dynamic random access memory (SDRAM) controller
  • Double data rate (DDR) 2 synchronous dynamic random access memory (SDRAM) controller

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0087] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0088] Such as image 3 As shown, the present invention provides a DDR2 SDRAM controller, including a system configuration bus interface 1, one or more system data bus interfaces 2, a control register 3, a command arbiter 4, a command queue and a reordering module 5, and a read flag advanced first Output module 6 and DDR2SDRAM interface 7.

[0089] The system configuration bus interface 1 uses an asynchronous design for receiving configuration bus (Config Bus) system configuration information and storing it in the control register 3, and isolating the system configuration bus clock and the DDR2 SDRAM controller clock.

[0090] The control register 3 is used to output working parameters according to the system configuration inform...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a double data rate (DDR) 2 synchronous dynamic random access memory (SDRAM) controller. Due to the fact that the DDR2SDRAM controller follows a DDR2SDRAM interface protocol, data transmission between the DDR2SDRAM controller and an outside DDR2SDRAM is achieved. The DDR2SDRAM controller comprises a DDR2SDRAM interface, a system data bus interface, an order arbiter and a command queuing and reordering module, wherein the DDR2SDRAM interface achieves various signals a DDR2SDRAM interface protocol definition; the system data bus interface achieves an interface function of the sides of system data buses and can be copied to meet requirements of the connection of a plurality of data buses; the order arbiter aims at requests of the plurality of data buses and enables only one route of data bus to visit the outside DDR2SDRAM within the same time; the command queuing and reordering module receives a reading/writing request command which is output by the order arbiter, the reading/writing request command is reordered according to relevancy of an address, and thereby the use ratio of the DDR2SDRAM interface is improved.

Description

technical field [0001] The invention relates to a DDR2 SDRAM controller. Background technique [0002] At present, DDR2 SDRAM is widely used, and many application systems will use DDR2 SDRAM as memory. Compared with DDR SDRAM, DDR2 SDRAM has the characteristics of low power consumption and high available bandwidth, so it is especially suitable for video codec, image processing, etc. Applications for data throughput. [0003] First, the data bandwidth that DDR2 SDRAM can provide is determined by Equation 1 below: [0004] Data bandwidth = data line bit width * 2 * clock frequency * utilization rate (Formula 1) [0005] Due to the natural properties of DDR2 SDRAM, there are many additional operations in the process of transmitting data, such as activating the corresponding BANK according to the address, and timing refresh (REF) operations, etc., so DDR2 SDRAM does not perform every clock cycle. To transmit data, how to maximize the theoretical bandwidth provided by DDR2 SDR...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F13/16
Inventor 郑宇驰
Owner OMNIVISION TECH (SHANGHAI) CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap