Programming method for multi-bit nonvolatile memory cell and multi-bit nonvolatile memory unit array

Abstract

The invention provides a programming method for a multi-bit nonvolatile memory cell. The programming method comprises the steps of applying identical positive bias voltages on a substrate and a source terminal of a p-channel non-volatile memory cell, with a drain terminal grounded, applying a programming pulse voltage on a grid electrode; and programming the multi-bit nonvolatile memory cell in a setting state after a plurality of programming cycles comprising an electronic FN tunneling process and a channel hot electron injection process. Accordingly, the invention provides a programming method for a multi-bit nonvolatile memory unit array. A process for forming a memory cell threshold voltage steady state of the programming method provided by the invention is a self-convergence process and a repeated inspection process of a conventional programming method is omitted, so that programming speed of the multi-bit nonvolatile memory is effectively increased. By setting pulse parameters for the FN tunneling process and the channel hot electron injection process, the memory cell can be directly programmed to a designated state, so that programming accuracy of the multi-bit non-volatile memory cell is increased, and programming speed and accuracy can be taken into account at the same time.

Description

technical field [0001] The invention relates to the technical field of semiconductor memory, in particular to a method for programming p-type channel multi-bit non-volatile memory cells and arrays. Background technique [0002] At present, the development of memory technology has become an important driving force for the advancement of integrated circuit design and manufacturing, and occupies a very important position in the field of microelectronics. While the storage device structure is developing towards nanometer feature size, it is facing severe challenges in terms of storage speed and density. Multi-bit non-volatile storage technology can generate multi-level storage states, effectively improving the storage density of the memory. [0003] Non-volatile memory cell structure see figure 1 , including an n-type silicon substrate 1, a p-type heavily doped source region S and a drain region D on the silicon substrate, a tunneling dielectric layer 2 covering the carrier cha...

AI Technical Summary

Problems solved by technology

[0005] The main purpose of the present invention is to solve the problem that the traditional programming method cannot take into account both programming speed and programming accuracy when programming p-type channel multi-bit non-volatile memory cells

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