Method for detecting load effect of grinding process

Abstract

The invention relates to the field of semiconductor fabrication, in particular to a method for detecting a load effect of a grinding process. A test wafer is adopted to test a grinding defect spacing of a planarization process and optimal process time of the grinding process, virtual patterns corresponding to the spacing are arranged on a process wafer, a planarization process of the optimal process time is carried out on the process wafer, and therefore generation of the load effect caused by different densities of pictures on the wafers can be effectively avoided, the product performance is improved, and meanwhile the product yield is increased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for detecting the load effect of a grinding process. Background technique [0002] With the development of integrated circuit technology and the improvement of integration, the virtual graphics area on the edge of the chip on the wafer is often used to lay out some functional circuits. Because these areas are close to the chip dicing line, they often have a relatively empty area, while in The process operation in actual production can easily form different process conditions in the open area and dense area of ​​the wafer, resulting in a load effect, especially when the planarization process is performed on a large-sized wafer, the formed load effect is more obvious; for example, in When the chemical mechanical polishing process (CMP) is performed on the wafer, since the entire wafer is ground together, the large-sized wafer (such as a wafer with a diameter of 3...

AI Technical Summary

Problems solved by technology

This technical document also does not disclose any relevant technical features related to solving the problem of excessive grinding defects caused by different grinding rates caused by different pattern densities

Images