3388 results about "Process operation" patented technology

The present invention relates to an apparatus and method for processing the flow of semiconductor wafers through a furnace tool having a front-opening unified pod (FOUP) material handling system. The invention provides for an automated control flow to realize greater efficiency and assure process quality. In one aspect of the invention the wafer batch completing its operation is discharged simultaneous with the charging of the next batch. Essentially the operation takes place by overlapping processing operations. An embodiment of the invention includes a process comprising the steps of: providing a first batch of semiconductor material, and loading the first batch into a carrier which transports the first batch into a semiconductor manufacturing process, and while the first batch undergoes the process, forming a second batch of semiconductor material, and pausing a second batch process operation until the first batch completes processing, to reduce the idle time of said process.

This invention relates to a process for transforming methanol to aromatic hydrocarbons, comprising: use methanol as raw material, with modified ZSM-5 molecular sieve as catalyst, under conditions of operation pressure 0.1-5.0Mpa, operation temperature 300-460Deg C, raw material liquid air speed 0.1-6.0h-1, transformed to products with aromatic hydrocarbons as main components; separate the gas-phase products lower carbon hydrocarbons from the liquid-phase C5+ hydrocarbons by cooling separation; the liquid-phase C5+ hydrocarbons then can be separated to be aromatic hydrocarbons and non-aromatic hydrocarbons by extracting separation. This invention is characterized of high total selectivity of aromatic hydrocarbons and flexible process operation.

A computerized system and method is described for classifying objects as malicious by processing the objects in a virtual environment and monitoring behaviors during processing by one or more monitors. The monitors may monitor and record selected sets of process operations and capture associated process parameters, which describe the context in which the process operations were performed. By recording the context of process operations, the system and method described herein improves the intelligence of classifications and consequently reduces the likelihood of incorrectly identifying objects as malware or vice versa.

In one illustrative embodiment, the method comprises providing a plurality of wafer lots, each of the lots comprising a plurality of wafers, performing at least one process operation on at least some of the wafers in each of the plurality of lots, identifying processed wafers having similar characteristics, re-allocating the wafers to lots based upon the identified characteristics, and performing additional processing operations on the identified wafers having similar characteristics in the re-allocated lots. In one illustrative embodiment, the system comprises a first processing tool for performing processing operations on each of a plurality of wafers in each of a plurality of wafer lots, a controller for identifying processed wafers having similar characteristics and re-allocating the wafers to lots based upon the identified characteristics, and a second processing tool adapted to perform additional processing operations on the identified wafers having similar characteristics in the re-allocated lot.

Disclosed are methods of forming bulk FinFET semiconductor devices to reduce punch through leakage currents. One example includes forming a plurality of trenches in a semiconducting substrate to define a plurality of spaced-apart fins, forming a doped layer of insulating material in the trenches, wherein an exposed portion of each of the fins extends above an upper surface of the doped layer of insulating material while a covered portion of each of the fins is positioned below the upper surface of the doped layer of insulating material, and performing a process operation to heat at least the doped layer of insulating material to cause a dopant material in the doped layer to migrate from the doped layer of insulating material into the covered portions of the fins and thereby define a doped region in the covered portions of the fins that is positioned under the exposed portions of the fins.

Methods and apparatus are disclosed for handling fatal computer hardware errors on a computer that include halting data processing operations of the computer upon occurrence of a fatal hardware error; signaling by a source chip of a chipset to the programmable logic device the occurrence of a fatal hardware error; signaling by the programmable logic device to an embedded system microcontroller the occurrence of a fatal hardware error; reading by the embedded system microcontroller through at least one sideband bus from registers in chips of the chipset information regarding the cause of the fatal hardware error; and storing by the embedded system microcontroller the information in non-volatile random access memory of the embedded system microcontroller.

Thousands of process and equipment measurements are gathered by the modern digital process control systems that are deployed in refineries and chemical plants. Several years of these data are historized in databases for analysis and reporting. These databases can be mined for the data patterns that occur during normal operation and those patterns used to determine when the process is behaving abnormally. These normal operating patterns are represented by sets of models. These models include simple engineering equations, which express known relationships that should be true during normal operations and multivariate statistical models based on a variation of principle component analysis. Equipment and process problems can be detected by comparing the data gathered on a minute by minute basis to predictions from these models of normal operation. The deviation between the expected pattern in the process operating data and the actual data pattern are interpreted by fuzzy Petri nets to determine the normality of the process operations. This is then used to help the operator localize and diagnose the root cause of the problem.

The present invention provides a nano-integrated system assembly that offers both convenience and cost-efficiency, where multiple fluidic, electronic and mechanical components or chemical processes are optimally embraced effectively and efficiently in a systematic modularized manner. Furthermore, the nano-integrated system assembly has a generic configuration so as to enable and accommodate a wide spectrum of differently combined sequences of analyzing/processing operations to be performed on the identical nano-integrated system assembly.

One illustrative method disclosed herein includes, among other things, forming a multi-layer patterned masking layer comprised of first and second layers of material and first and second openings that extend through both of the first and second layers of material, wherein the first opening is positioned above a first area of the substrate where the DDB isolation structure will be formed and the second opening is positioned above a second area of the substrate where the SDB isolation structure will be formed. The method also includes performing a first process operation through the first opening to form the DDB isolation structure, performing a second process operation to remove the second layer of material and to expose the first opening in the first layer of material, and performing a third process operation through the second opening to form the SDB isolation structure.

One method disclosed herein includes forming a sacrificial etch stop material in a recess above a replacement gate structure, with the sacrificial etch stop material in position, forming a self-aligned contact that is conductively coupled to the source/drain region, after forming the self-aligned contact, performing at least one process operation to expose and remove the sacrificial etch stop material in the recess so as to thereby re-expose the recess, and forming a third layer of insulating material in at least the re-exposed recess.

Some embodiments provide a media-editing application. The application includes several image processing destinations for performing operations on video images. The application includes a scheduling engine for scheduling disk read, decode, and graphics processing operations to perform on images to prepare the images for the several destinations. The scheduling engine includes a first set of instructions for scheduling images based on a speed at which a particular one of the several destinations processes the images when none of the destinations require images in real-time. The scheduling engine includes a second set of instructions for scheduling images based on a real-time clock when at least one of the several destinations requires images in real-time.

One illustrative method disclosed herein includes, among other things, forming an initial vertically oriented channel semiconductor structure having a first height above a substrate, forming a sacrificial spacer structure adjacent the initial vertically oriented channel semiconductor structure and, with the sacrificial spacer in position, performing at least one process operation to define a self-aligned bottom source/drain region for the device that is self-aligned with respect to the sacrificial spacer structure, forming an isolation region in the trench and forming a bottom source/drain electrode above the isolation region. The method also includes removing the sacrificial spacer structure and forming a bottom spacer material around the vertically oriented channel semiconductor structure above the bottom source/drain electrode.

The invention discloses a hydrocracking process operation method. Hydrocracking pre-refining catalyst is treated by precuring outside a reactor while hydrocracking catalyst is not treated or is partially treated by precuring outside the reactor. Curing ingredient introduced by the hydrocracking pre-refining catalyst and the hydrocracking catalyst precured outside the reactor accounts for 90-120% of the theoretical sulfur demand for all the catalyst. The hydro cracking pre-refining catalyst and the hydro cracking catalyst are layered in the reactor and then activated by heating, so that all the catalyst is sulfurated effectively. The method of the invention can precure the hydrocracking pre-refining catalyst outside the reactor or precure the hydrocracking pre-refining catalyst and partial hydrocracking catalyst outside the reactor, thus reducing the catalyst requiring precuring outside the reactor, reducing the production period and production cost of the precuring catalyst and improving the economic benefit and production security.

A bar code (10) has primary information (46, 48, 50, 51) encoded in one direction (e.g., horizontally) and secondary information (13, 21, 36) encoded in another direction (e.g., vertically) in single (11) or multiple tracks (35) in selected ones of the vertical bars (11) of a bar code (10). Using a non-linear, variable amplitude scanner, all of the bars are scanned in the one direction to obtain all of the primary information and all of those vertical bars having secondary information are scanned in the other direction to obtain all of the secondary information. The one direction which is perpendicular to the vertical bars (11), is determined by first rotating the scan path axis (86, 87) until both start (46) and end (48) code bars are read thereby placing the scan path entirely within the total bar code, and, then, further rotating the scan path (88, 89) to determine the direction of the minimum crossing width (Lsc 80) of the total bar code (10). Secondary information is scanned in planes orthogonal to the one direction after those vertical bars (11) having such information are first identified and selected. In a preferred embodiment, the decoded secondary information may be used to control selected station process operations for selected products in a continuous manufacturing assembly line.

An apparatus, system, and method are disclosed for power loss management in a nonvolatile data storage device. A monitor module initiates a power loss mode in the nonvolatile data storage device in response to a primary power source failing to supply electric power above a predefined threshold to the nonvolatile data storage device. A secondary power source supplies electric power to the nonvolatile data storage device for at least a power hold-up time during the power loss mode. A power loss module adjusts execution of in-process operations on the nonvolatile data storage device during the power loss mode so that essential in-process operations execute within the power hold-up time.

A data processing system 2 executes non-native program instructions using either a first execution environment 14 or a second execution environment 22. The first execution environment identifies at runtime if non-native program instructions to be executed are marked as intended for execution by the second execution environment. When such instructions are encountered the first execution environment triggers performance of data processing operations as specified by the one or more marked program instructions performed by the second execution environment. When those processing operations as specified by the one or more marked program instructions have been completed, a return is made to the first execution environment.

A method and an apparatus for performing a process control using partial measurement data. A process operation is performed on a semiconductor wafer. Inline metrology data related to the process of the semiconductor wafer is acquired. A partial measurement data acquisition process is performed based upon the inline metrology data, the partial measurement data acquisition process comprising determining a time period for acquiring the inline metrology data, determining a number of wafers to be sampled based upon the time period, and determining a number of wafer sites for data acquisition. At least one of a feedback adjustment on a second semiconductor wafer and a feed-forward adjustment relating to a subsequent processing of the first semiconductor wafer based upon the partial measurement data acquisition process is performed.

A costing process that takes advantage of real-time information about plant floor activities and provides a more accurate and timely financial feedback about the process efficiencies in response to new changes in the process operation. The costing process includes identifying stations that consume resources, consume activities and supply activities. The costing process also identifies a plurality of resources that are provided to one or more of the stations. The costing process also includes identifying resources from the plurality of resources that are used as needed and resources that are supplied in advance of being used. The costing process allocates costs for each resource to each station that the resource supplies, including calculating a cost rate, calculating a cost of used capacity and calculating a cost of unused capacity. The costing process then determines the cost that each station and product uses based on the allocations.

A terminal apparatus displays an enlarge-processed image based upon an image having predetermined resolution while an image having high resolution is acquired, and switches the displayed image to display an image having the high resolution when the acquiring operation of the image having the high resolution is accomplished. The terminal apparatus can performs display operations based upon a panning process operation and a tilting process operation in addition to the enlarging process operation.