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A Flipping Hardening Method for Spaceborne Digital Signal Processor

A digital signal and processor technology, applied in the field of on-board digital signal processor inversion reinforcement, can solve problems such as high hardware overhead, poor versatility, hardware redundancy, etc., to improve reliability, reduce the probability of single-event inversion, and improve Effects of Inherent Reliability

Active Publication Date: 2015-09-23
XIAN INSTITUE OF SPACE RADIO TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Method ③ Although the problem of single event flipping is solved, its disadvantage is that the hardware overhead is large and hardware redundancy is required
Method ④ has high reliability, but poor versatility

Method used

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  • A Flipping Hardening Method for Spaceborne Digital Signal Processor
  • A Flipping Hardening Method for Spaceborne Digital Signal Processor
  • A Flipping Hardening Method for Spaceborne Digital Signal Processor

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Embodiment Construction

[0026] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

[0027] Such as figure 1 Shown is the principle block diagram of the flipping reinforcement method for the onboard digital signal processor of the present invention. The present invention is realized through the flipping reinforcement system of the onboard digital signal processor. It can be seen from the figure that the flipping reinforcement system of the onboard digital signal processor includes a DSP chip, an ASIC chip, PROM memory and SRAM memory, wherein the ASIC chip includes a first three-mode redundant input module, a second three-mode redundant input module, a third three-mode redundant input module, a first judgment module, a second judgment module, and a third judgment module module, reset module, three EDAC modules, three EDAC data generation modules and three watchdog modules.

[0028] Among them, the ASIC chip, SRAM memory and PRO...

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Abstract

The invention relates to a spaceborne digital signal processor turning reinforcing method which is achieved through a spaceborne digital signal processor turning reinforcing system. The spaceborne digital signal processor turning reinforcing system comprises a digital signal processor (DSP) chip, an application specific integrated circuit (ASIC) chip, a programmable read only memory (PROM) and a static random access memory (SRAM). The method includes the steps of utilizing the design integrating outside slice running, error detection and correction (EDAC), an ASIC technology and a watchdog, meanwhile utilizing a radiation-proof ASIC technology to organically combine various anti-spatial-single-particle measures together, and to form a unique novel anti-single-particle reinforcing method. The spaceborne digital signal processor turning reinforcing method has the advantages of being capable of simplifying the system and improving inherent reliability, few in hardware resources, low in design complexity, simple in achieving, and capable of greatly reducing the rate of occurrence of single-particle events when the DSP chip runs in a bad radiation environment.

Description

technical field [0001] The invention relates to a flipping reinforcement method for a satellite-borne digital signal processor (DSP), which belongs to the field of anti-single particle design of a satellite payload platform. Background technique [0002] In recent years, the anti-single event protection design of digital signal processors (DSP) at home and abroad learned from public publications and public channels is as follows: [0003] Method ①Using error detection and correction circuit (EDAC) and coding to detect and correct single event flipping. At present, there are two main ways to realize EDAC at home and abroad: CPU chip with EDAC function and FPGA programming to realize EDAC function; [0004] Method ② The program code is directly solidified and run in the PROM which is almost immune to single event upset. However, due to the limitation of the operating speed of the PROM, the program data is generally first moved to the storage area inside the processor to run. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10
Inventor 邢炜钟兴旺张立新陶晓霞吴国春
Owner XIAN INSTITUE OF SPACE RADIO TECH
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