Cache device and cache data acquisition method for the cache device

Abstract

The present invention provides a cache device and a cache data acquisition method for the cache device, wherein the cache device is coupled to a processing device, a plurality of system components and an external storage control module, and the cache device is used to store all types of The communication flow is exchanged from the processing device and the plurality of system elements to the external storage control module; and the cache device includes: a plurality of cache units and a data access unit, the plurality of cache units includes a plurality of cache lines, and the plurality of A cache unit corresponds to a plurality of cache sets; the data access unit is used for exchanging data of the processing device, the plurality of cache units and an external storage device coupled to the external storage control module according to at least one request signal. The cache device provided by the invention can effectively prefetch data from the external storage device, remove data from the cache device, and significantly improve the performance of the cache device.

Description

technical field [0001] The present invention relates to a caching device, and more specifically, to a caching device and a method for acquiring cached data used in the caching device. Background technique [0002] Caches have been used for decades to improve processor performance. Caching is a known technology that improves system on chip (SoC) performance. Generally, caches can be divided into various types according to storage size and distance from the processor, such as level 1 cache (level1 cache), level 2 cache (level2 cache), and level 3 cache (level3 cache). [0003] Please refer to FIG. 1 , which is a schematic diagram of an SoC system 10 using a conventional cache device 102 . As shown in FIG. 1 , SoC system 10 includes a processing device 100 , a cache device 102 , an external memory controller 104 , an external memory device 106 and a plurality of system components 108 . The processing device 100 is configured to process data obtained from the cache device 102...

AI Technical Summary

Problems solved by technology

However, a cache line replacement usually triggers a read that conflicts with a dirty cache line writeback

As a result, the processing device 100 may stall to wait for the result of the read operation

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