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Thin film transistor, manufacturing method thereof, and display

A technology of thin-film transistors and manufacturing methods, applied in the field of bottom-gate thin-film transistors, capable of solving problems such as damaged back channels and easy-to-damage active layers

Active Publication Date: 2016-07-06
INNOCOM TECH (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In the prior art, the process of bottom gate thin film transistors will encounter some problems, for example, when forming the source and drain, it is easy to damage the underlying active layer, so that the back channel is damaged

Method used

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  • Thin film transistor, manufacturing method thereof, and display
  • Thin film transistor, manufacturing method thereof, and display
  • Thin film transistor, manufacturing method thereof, and display

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Embodiment Construction

[0046] The fabrication and use of the embodiments of the present invention will be described in detail below. It should be noted, however, that the present invention provides many applicable inventive concepts, which can be embodied in various specific forms. The specific embodiments discussed herein are merely specific ways to make and use the invention, and do not limit the scope of the invention. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the present invention, and do not represent any relationship between the different embodiments and / or structures discussed. Furthermore, when it is mentioned that a first material layer is located on or above a second material layer, it includes the situation that the first material layer is in direct contact with the second material layer or is separated by one or more other material layers. In the drawings, th...

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Abstract

The invention discloses a fabricating method of a thin film transistor, which comprises the steps as follows: providing a substrate; forming a grid electrode, a grid insulation layer covering grid electrode and an initiative layer on the substrate in sequence; forming a conductive layer which comprises a source electrode, a drain electrode and a partition part located between the source electrode and the drain electrode on the initiative layer; forming a first light resistance layer on the conductive layer, covering the source electrode and the drain electrode by the first light resistance, and exposing the partition part; enabling the partition part to oxidize, so that an insulating metal oxide layer is formed and the source electrode and the drain electrode are isolated electrically; and removing the first light resistance layer. According to the invention, the partition part is reserved when the partition part (for connecting the source electrode and the drain electrode) is etched, then the source electrode and the drain electrode are isolated electrically in a partition part reoxidation manner, and the initiative layer below the partition part is prevented from being damaged by the etching process.

Description

technical field [0001] The present invention relates to a thin film transistor, and in particular to a bottom gate thin film transistor. Background technique [0002] With the advancement of display technology, people can make their lives more convenient with the assistance of displays. In order to achieve the characteristics of lightness and thinness of displays, flat panel displays (FPDs) have become the current mainstream. Among many flat panel displays, a liquid crystal display (LCD) has superior characteristics such as high space utilization efficiency, low power consumption, no radiation, and low electromagnetic interference. Therefore, the liquid crystal display is very popular among consumers. [0003] A liquid crystal display is mainly composed of an active array substrate, a color filter substrate and a liquid crystal layer between the two substrates. The active array substrate has an active area and a peripheral circuit area. The active array is located in the a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78H01L27/32G02F1/1368
Inventor 李冠锋
Owner INNOCOM TECH (SHENZHEN) CO LTD