Post-passivation interconnect structure and method of forming the same

Abstract

A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure.

Description

technical field [0001] The present disclosure relates to the fabrication of semiconductor devices, and more particularly, to the fabrication of post-passivation interconnect (PPI) structures. Background technique [0002] Modern integrated circuits are composed of millions of active devices such as transistors and capacitors. These devices are initially isolated from each other, but are then interconnected together to form a functional circuit. Typical interconnect structures include lateral interconnects such as metal lines (wires) and vertical interconnects such as vias and contacts. Interconnects increasingly determine the performance and density limits of modern integrated circuits. On top of the interconnect structure, bond pads are formed and exposed on the surface of the corresponding chip. Electrical connections are made through the bond pads to connect the chip to a packaging substrate or another die. Bond pads are used for wire bonding or flip chip packaging. ...

AI Technical Summary

Problems solved by technology

However, the interface between the bump and the polymer layer has poor adhesion and suffers from moisture attack, which causes delamination in the polymer layer

Images