Continuous-time oversampled converter having passive filter

A converter and filter technology, applied in the direction of analog conversion, code conversion, electrical components, etc.

Active Publication Date: 2013-09-25
MEDIATEK SINGAPORE PTE LTD SINGAPORE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition, under the condition that a large number of consumer markets continue to promote the integration level of a single chip, the coupling n

Method used

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  • Continuous-time oversampled converter having passive filter
  • Continuous-time oversampled converter having passive filter
  • Continuous-time oversampled converter having passive filter

Examples

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Embodiment Construction

[0033] Please refer to figure 1 , in some embodiments, a third order (third order) continuous time integration triangular analog-to-digital converter 100 includes three integrator stages (integrator stage) 102, 104 and 106, a quantizer (quantizer) 108, an external Feedback DAC 110 (DAC2) and an internal feedback DAC 112 (DAC1). The first integrator stage 102 includes a voltage amplifier (A1) 118, a plurality of input resistors 114a, 114b, 116a, 116b, and a plurality of integrating capacitors (C1) 120a, 120b. The integrator stage 102 receives a differential input signal U(t) 134 through a low-pass filter 126 formed by input resistors 114 a , 114 b , 116 a , 116 b and a capacitor 122 . The low-pass filter 126 reduces high-frequency components of the input current derived from the input signal U(t) and supplied to the input terminals 124 a , 124 b of a voltage amplifier 118 . The low-pass filter 126 has a cutoff frequency and is used to reduce the variation of the current thro...

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Abstract

A continuous-time sigma-delta analog-to-digital converter includes a first integrator stage to integrate a difference between a first differential signal derived from a differential analog input signal and a second differential signal derived from a quantized output signal, a quantizer and a low pass filter. The first integrator stage has a differential operational amplifier, first, second, third, and fourth input resistors, and a first pair of integrating capacitors. The differential analog input signal is received at first and second input nodes of the converter. The first and third input resistors are coupled in series between the first input node and a first input of the operational amplifier. The second and fourth input resistors are coupled in series between the second input node and a second input of the operational amplifier. The first and second input resistors are coupled to the third and fourth input resistors, respectively.

Description

[0001] Cross references to related applications [0002] This application claims priority to US Provisional Application 61 / 435,012 (filed January 21, 2011), which is hereby incorporated by reference in its entirety. technical field [0003] The disclosed embodiments of the present invention relate generally to electronic devices, and more particularly to continuous-time oversampled converters. Background technique [0004] The difference between a continuous-time analog-to-digital converter (CT ADC) and a discrete-time analog-to-digital converter (DT ADC) is that the continuous-time analog-to-digital converter Instead of sampling in its front-end circuitry, the continuous-time ADC applies some form of filtering or Analog processing. Continuous-time ADCs have several advantages over discrete-time ADCs, such as better immunity to coupled noise and lower power consumption. In addition, for continuous-time ADCs, another benefit is that anti-aliasing filters can be omitted. ...

Claims

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Application Information

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IPC IPC(8): H03M3/00
CPCH03M3/368H03M3/452H03M3/454
Inventor 米迦勒·A·小阿士伯恩杰弗里·卡尔·吉罗
Owner MEDIATEK SINGAPORE PTE LTD SINGAPORE
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