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Fabrication method of metal oxide semiconductor transistor

A technology of oxide semiconductors and production methods, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of excessive introduction, affecting the electrical performance of devices, and large parasitic capacitance, so as to reduce leakage current and avoid Excessive thermal budget issues, effects of low dielectric constant

Active Publication Date: 2015-12-09
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] figure 2 In the SOI-based MOS transistor, although BOX08 is "L"-shaped, which can reduce the leakage current caused by the expansion of the drain depletion layer, BOX08 is formed by thermal oxidation, and the extremely high thermal oxidation temperature will introduce too much heat Budget, and because BOX08 is generally an oxide layer, the parasitic capacitance between the source or drain and the substrate is very large, which affects the electrical performance of the device

Method used

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  • Fabrication method of metal oxide semiconductor transistor
  • Fabrication method of metal oxide semiconductor transistor
  • Fabrication method of metal oxide semiconductor transistor

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Embodiment Construction

[0033] In order to make the object, technical solution, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0034] The present invention has been described in detail using schematic diagrams. When describing the embodiments of the present invention in detail, for the convenience of explanation, the schematic diagram showing the structure will not be partially enlarged according to the general scale, which should not be used as a limitation of the present invention. In addition, in actual production In , the three-dimensional space dimensions of length, width and depth should be included.

[0035] The schematic flow chart of MOS transistor manufacturing method method of the present invention is as image 3 shown. Combine below Figure 4 to Figure 12 Describe in detail. The method includes the following steps:

[0036] Step 301, please refer to Figure 4 ...

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Abstract

The invention provides a method for manufacturing a metal oxide semiconductor transistor. A second side wall layer is formed between a source / drain layer and a channel, and an air buried layer is formed between the surface of a semiconductor substrate and the source / drain layer. On the basis of reducing leakage current due to extension of a drain depletion layer, source drain stray capacitance is reduced, and thermal budgets are reduced.

Description

technical field [0001] The invention relates to semiconductor device manufacturing technology, in particular to a method for manufacturing metal oxide semiconductor transistors. Background technique [0002] As we all know, the use of a semiconductor substrate similar to bulk silicon as the first-generation silicon substrate has been challenged in many ways, so it is proposed to add an insulating layer to the semiconductor substrate, that is, silicon-on-insulator (SOI, Silicon- On-Insulator) technology. like figure 1 As shown, the SOI technology based on bulk silicon 100 is used as an example for illustration. The SOI technology divides the bulk silicon 100 into three layers, and the surface is a thin layer of top silicon 102 (TopSilicon), which is used to manufacture semiconductor devices. The top silicon 102 The thickness ranges from 200 angstroms to several microns, depending on different applications; under the top layer of silicon 102 is an insulating buried layer (bu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
Inventor 卜伟海康劲
Owner SEMICON MFG INT (SHANGHAI) CORP
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