Semiconductor device packing structure and semiconductor device packing technological process

A technology of packaging structure and process flow, which is applied in the direction of semiconductor devices, semiconductor/solid-state device components, semiconductor/solid-state device manufacturing, etc., can solve the problems of semiconductor devices occupying a large area and complex processes, etc., to reduce the overall area and simplify Packaging process, the effect of improving flexibility

Active Publication Date: 2013-11-27
TIANJIN UNIV
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Problems solved by technology

[0013] Aiming at the problem that the semiconductor device occupies a large area in the related art and the process of packaging the semiconductor device is relatively complicated, the present invention proposes a semiconductor device packaging structure and a process flow for packaging the semiconductor device, which can simplify the packaging process of the semiconductor device and reduce the The footprint of a semiconductor device completed in a small package

Method used

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  • Semiconductor device packing structure and semiconductor device packing technological process
  • Semiconductor device packing structure and semiconductor device packing technological process
  • Semiconductor device packing structure and semiconductor device packing technological process

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Embodiment Construction

[0056] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments of the present invention belong to the protection scope of the present invention.

[0057] According to an embodiment of the present invention, a packaging structure of a semiconductor device is provided.

[0058] A package structure of a semiconductor device according to an embodiment of the present invention includes:

[0059] a substrate, the substrate has a plurality of conductive vias electrically isolated from each other, at least part of each conductive via is located in the substrate, and the portion of each conductive via in the substrate is separated from the The ...

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Abstract

The invention discloses a semiconductor device packing structure and semiconductor device packing technological process. The packing structure comprises a substrate and at least one semiconductor device, wherein a plurality of conductive through holes are formed in the substrate and are electrically isolated from one another, and the semiconductor device is arranged on one side of the substrate and electrically connected with the conductive through holes. The conductive through holes in the substrate of the packing structure of the semiconductor device can simplify the packing processes of the semiconductor device, improve the flexibility for choosing the packing processes and reduce the whole size of the packed semiconductor device. In addition, the semiconductor device can be electrically connected with the outside through the conductive through holes.

Description

technical field [0001] The present invention relates to the semiconductor field, and in particular, relates to a packaging structure of a semiconductor device and a packaging process flow of the semiconductor device. Background technique [0002] Piezoelectric film bulk acoustic resonators (FBARs) can replace surface acoustic wave devices and quartz crystal resonators in radio frequency communications and high-speed serial data applications. FBAR-based filters and / or duplexers can provide superior filtering characteristics for RF front-end modules, for example, can provide low insertion loss, steep transition band, large power capacity, strong anti-static discharge (ESD) capability, etc. The advantages of high-frequency FBARs with ultra-low frequency temperature drift are low phase noise, low power consumption, and large bandwidth modulation range. In addition, FBARs can be fabricated using complementary metal-oxide-semiconductor (CMOS)-compatible process technologies. Mo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/48H01L25/16H01L21/60
Inventor 庞慰陶金张孟伦张代化张浩
Owner TIANJIN UNIV
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