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A tsv flattening method

A flattening method and mechanical leveling technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as inability to improve, and achieve the effects of reducing pressure, reducing manufacturing costs, and improving yield

Active Publication Date: 2016-08-24
NAT CENT FOR ADVANCED PACKAGING CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the combination of these two steps (electrochemical corrosion thinning + CMP) can only deal with the flat surface of the wafer after electroplating. If there are protrusions or pits at the TSV position after electroplating, it still cannot be improved.

Method used

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Embodiment Construction

[0020] The present invention will be further described below in conjunction with drawings and embodiments.

[0021] figure 1 Shown is a process flow diagram corresponding to a preferred embodiment of a TSV planarization method proposed by the present invention, and each step will be introduced below.

[0022] S0: if figure 2 As shown, the TSV electroplating filling and annealing operations have been completed on the wafer substrate 1 , the filling material 4 is metal copper, and the filling method is electroplating. The periphery of the TSV structure includes a sidewall insulating layer 2 and a TSV sidewall diffusion barrier layer 3 . The thickness of the copper layer on the wafer surface after electroplating and annealing treatment is t1. Subsequent TSV planarization treatment is required. Due to process defects or plating unevenness, etc., after plating and annealing, some TSV tops will have a convex or pit-like morphology, such as figure 2 There is a convex shape at ...

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PUM

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Abstract

The present invention provides a TSV planarization method, comprising the following steps: the first step is to process the surface of the TSV plated wafer by mechanical scraping to eliminate surface protrusions or pits; the second step is to use a wet method Corrosion or electrochemical polishing is used to thin the metal layer on the wafer surface; the third step is chemical mechanical polishing to remove the remaining metal layer and diffusion barrier layer on the wafer surface. The advantages of the present invention are: the present invention uses mechanical scraping to process the surface after electroplating filling, eliminates local planarization problems such as protrusions and depressions, and then combines electrochemical polishing and CMP to provide a TSV planarization solution. The three-step method can compensate for some defects in electroplating, reduce the pressure on the TSV electroplating filling step, and also reduce the pressure on the CMP process, which can increase the yield and reduce the overall manufacturing cost.

Description

technical field [0001] The invention relates to a TSV planarization method, which belongs to the technical field of semiconductor manufacturing. Background technique [0002] The planarization after TSV (Vertical Through Silicon Via) electroplating and filling is a key step in TSV manufacturing. Its performance is related to the quality of electroplating filling, planarization method, equipment control and other factors, and its process results directly affect the processing quality of subsequent process steps. Therefore, how to compensate for the process defects of the electroplating and filling process before the planarization operation and how to ensure the quality of the planarization process is one of the keys to ensure the yield of TSV manufacturing. The current mainstream implementation method is to use CMP, which uses expensive precision equipment to remove the metal layer on the surface of the TSV after electroplating by means of a combination of mechanics and chemi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
CPCH01L21/76898H01L21/7684
Inventor 张文奇顾海洋宋崇申于大全上官东恺
Owner NAT CENT FOR ADVANCED PACKAGING CO LTD
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