Time domain ADC based on cycle time digital converter

Abstract

The invention relates to the field of analog integrated circuit design of microelectronics in order to further expand and improve an input range and linearity of the traditional time domain ADC and reduce a delay matching error, and adopts the technical scheme that a time domain ADC (Analog to Digital Converter) based on a cycle time digital converter consists of three circuit modules. The circuit module I is a voltage-time converter VTC comprising two sampling switches Sh, two discharge switches Sd, two sampling capacitors CH or CL and Cref, two current supplies I and two comparators Com1 and Com2; one end of the first sampling switch Sh is connected with an analog input VH or VL; and the other end of the first sampling switch Sh is connected with one end of the sampling capacitor CH or CL and one end of the first discharge switch Sd. The other end of the sampling capacitor CH or CL is earthed. The ADC is mainly applied to the analog integrated circuit design.

Description

technical field [0001] The invention relates to the field of analog integrated circuit design of microelectronics, in particular to a time domain ADC based on a cycle time digital converter. technical background [0002] Time domain data transformation has developed rapidly in recent years. Time-domain ADCs are an effective solution to using digital circuits to process analog signals. Time-domain ADCs have many advantages. For example, the time-domain resolution of digital signal edge transmission is better than the voltage resolution of analog signals. Moreover, by using a time-domain ADC, the time difference change of the rising edge can replace the change of the traditional voltage and current, and the whole circuit can replace the analog circuit with large size and high power consumption. There are two important devices that make up the time-domain ADC, the voltage-to-time converter (Voltage to Time Converter, VTC) and the time-to-digital converter (Time to Digital Con...

AI Technical Summary

Problems solved by technology

[0004] The linearity and input range of traditional VTCs are not ideal. Because the linear input range used is very narrow, usually the input range of several hundred millivolts corresponds to less than several hundred picoseconds.

In addition, the traditional delay line structure TDC has errors in the time-to-digital quantization process due to the delay mismatch caused by process uncertainty and delay line folding.

These disadvantages limit subsequent signal processing and limit the performance of time-domain ADCs

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