Multiphase clock generating circuit for asynchronous successive approximation analog/digital converter

Abstract

The invention provides a multiphase clock generating circuit for an asynchronous successive approximation analog / digital converter. The multiphase clock generating circuit comprises a comparator, a NAND gate and a NOT gate, wherein the first output end and the second output end of the comparator are respectively connected with the first input end and the second input end of the NOT gate; the comparator is used for comparing input voltage signals and inputting the comparative result in the NAND gate; the NAND gate receives gating signals through the third input end of the NAND gate, and generates output signals according to the gating signals and output result of the comparator; the input end of the NOT gate is connected with the output end of the NAND gate, and the NOT gate is used for generating multiphase clock signals according to output signals. According to the embodiment of the invention, based on the principle of a gating annular oscillator, high-speed cascade interaction operation with asynchronous successive approximation logic is eliminated, so that a loop circuit for asynchronous conversion is simpler, thus the asynchronous conversion time of the asynchronous successive approximation analog / digital converter is reduced, and the conversion rate is improved. The invention also provides a control logic circuit for the synchronous successive approximation analog / digital converter.

Description

technical field [0001] The invention relates to the field of microelectronic technology, in particular to a multi-phase clock generation circuit for asynchronous step-by-step analog-to-digital converters and a control logic circuit with the same for asynchronous step-by-step analog-to-digital converters. Background technique [0002] The analog-to-digital converter (ADC) can realize the function of converting analog signals into digital signals. At present, the common structures include flash ADC, pipeline ADC, oversampling ADC, and progressive approximation ADC. As one of the types of ADCs, the progressive approximation ADC (SARADC) has been widely researched and applied because of its good compromise in speed, accuracy and power consumption. Compared with the synchronous SAR ADC with the same resolution, the asynchronous SAR ADC can not only achieve a higher conversion rate, but also avoid the use of a clock with a higher frequency than the sampling rate, reducing the powe...

AI Technical Summary

Problems solved by technology

[0010] Therefore, the multi-phase clock generated by this method triggers the asynchronous SAR logic, which makes the control loop of each conversion step more complex, with more loop delay and redundant time, and less time for analog signal establishment.

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