SOI structure and manufacturing method thereof
A manufacturing method and substrate technology, which are applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as latch-up effect, and achieve the effect of reducing parasitic capacitance
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[0037] In the existing semiconductor device with SOI structure, a certain size of parasitic capacitance is easily generated between the source region, the drain region and the substrate, and the parasitic capacitance will affect the radio frequency characteristics of the semiconductor device, making the signal strength output by the device worse, The signal waveform is distorted.
[0038] In order to solve the technical problem, the present invention provides an SOI structure, referring to figure 2 It is a schematic flow chart of an embodiment of the fabrication method of the SOI structure of the present invention. Described preparation method roughly comprises:
[0039] Step S1, providing a substrate;
[0040] Step S2, forming a buried oxide layer and a semiconductor layer sequentially located on the substrate;
[0041] Step S3, forming sidewalls on the sidewalls of the buried oxide layer and the semiconductor layer;
[0042] Step S4, using the sidewall as a mask, removi...
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