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Encapsulation structure and preparation method thereof

A packaging structure and molding compound technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid devices, etc., can solve the problem of increasing the path of plastic sealing compound rupture or the path of water vapor and other pollutants entering internal components, affecting the packaging structure Reliability, internal component damage and other issues, to increase the path of rupture or the path for water vapor and other pollutants to enter the internal components, not easy to crack, and increase the area

Active Publication Date: 2016-06-01
SILERGY SEMICON TECH (HANGZHOU) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a packaging structure and its preparation method to solve the problem that the existing packaging structure is likely to cause the plastic sealant to break, so that external water vapor or other pollutants enter the packaging structure and cause damage to the internal components; and the existing The packaging structure is not conducive to increasing the path of mold compound rupture or the path of water vapor and other pollutants entering internal components, which affects the reliability of the packaging structure

Method used

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  • Encapsulation structure and preparation method thereof
  • Encapsulation structure and preparation method thereof
  • Encapsulation structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] Please refer to Figure 4 ~ Figure 6 ,in, Figure 4 It is a three-dimensional schematic diagram of the packaging structure of Embodiment 1 of the present invention; Figure 5 yes Figure 4 AA' sectional view of the package structure shown; Figure 6 yes Figure 4 The BB' cross-section of the package structure shown. Specifically, such as Figure 4~6 As shown, in Embodiment 1 of the present application, the package structure 2 includes: a lead frame 20, a chip layer, an electrical connector 22, and a molding compound 23, the chip layer is located above the lead frame 20, and the chip layer At least one chip 21 is included, and the active surface of the chip 21 is electrically connected to the lead frame 20 through an electrical connector 22; the molding compound 23 encapsulates the chip layer, the electrical connector 22 and the lead frame 20;

[0053] Wherein, the lead frame 20 includes a plurality of pins 200, the side of the pins 200 used to electrically connect...

Embodiment 2

[0069] Please refer to Figure 11 , which is a schematic cross-sectional view of the package structure according to Embodiment 2 of the present invention. Such as Figure 11 As shown, in the second embodiment of the present application, the package structure 3 includes: a lead frame 30, a chip layer, an electrical connector 32, and a molding compound 33, the chip layer is located above the lead frame 30, and the chip layer At least one chip 31 is included, the active surface of the chip 31 is electrically connected to the lead frame 30 through an electrical connector 32; the molding compound 33 encapsulates the chip layer, the electrical connector 32 and the lead frame 30;

[0070] Wherein, the lead frame 30 includes a plurality of pins 300, the side of the pins 300 used to electrically connect the chip 31 is the top surface, and the side opposite to the top surface is the bottom surface, between the top surface and the bottom surface The sides are two opposite first sides a...

Embodiment 3

[0081] Please refer to Figure 13 , which is a schematic cross-sectional view of the packaging structure according to Embodiment 3 of the present invention. Such as Figure 13 As shown, in the third embodiment of the present application, the packaging structure 4 includes: a lead frame 40, a chip layer, an electrical connector 42, and a molding compound 43, the chip layer is located above the lead frame 40, and the chip layer At least one chip 41 is included, and the active surface of the chip 41 is electrically connected to the lead frame 40 through an electrical connector 42; the molding compound 43 encapsulates the chip layer, the electrical connector 42 and the lead frame 40;

[0082] Wherein, the lead frame 40 includes a plurality of pins 400, the side of the pins 400 used to electrically connect the chip 41 is the top surface, and the side opposite to the top surface is the bottom surface, between the top surface and the bottom surface The sides are two opposite first ...

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PUM

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Abstract

The invention provides a packaging structure and a preparation method thereof. A lead frame comprises a plurality of pins; one surface of each pin which is used for electrically connecting a chip is a top surface, the surface opposite to the top surface is a bottom surface, side faces between the top surface and the bottom surface are two opposite first side faces and two opposite second side faces, and the first side faces are longer and narrower than the second side faces; at least one section is formed between the top surface and the bottom surface, the width of the top surface is a first width, the width of the section is a second width, the second width is smaller than the first width, and the width of the top surface is a distance between the two first side faces on the top surface; the width of the section is a distance between the two first side faces on the section, so that the contact area of the side faces of each pin and a molding compound is increased, the molding compound is locked and is difficult to break, breakage paths of the molding compound or paths for vapor and other pollutants to enter internal devices are increased, and the packaging reliability is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a package structure and a preparation method thereof. Background technique [0002] The lead frame used in integrated circuit plastic packaging is a main structural material of integrated circuit packaging. It mainly plays the role of carrying the chip in the integrated circuit packaging structure, and at the same time plays the role of connecting the chip and the electrical signal of the external circuit board. [0003] Specifically, please refer to Figure 1 ~ Figure 3 ,in, figure 1 is a three-dimensional schematic diagram of an existing packaging structure; figure 2 for figure 1 AA' sectional view of the package structure shown; image 3 for figure 1 The BB' cross-section of the package structure shown. [0004] Such as figure 1 As shown, the existing packaging structure 1 includes a lead frame 10 , a chip 11 and an electrical connector 12 ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/495H01L23/31H01L21/60H01L21/56
CPCH01L2224/16245
Inventor 谭小春
Owner SILERGY SEMICON TECH (HANGZHOU) CO LTD
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