Semiconductor structure for WAT testing

Abstract

The invention provides a semiconductor structure for WAT testing. The semiconductor structure comprises a semiconductor substrate. The semiconductor substrate comprises active areas and a shallow trench isolation structure located between the active areas, the number of the active areas is at least two, and the feature sizes of the active areas are different. The surface of the shallow trench isolation structure is higher than the surfaces of the active areas. The semiconductor structure further comprises polycrystalline silicon layers and contact electrodes, wherein the shallow trench isolation structure and the surfaces of the active areas are covered with the polycrystalline silicon layers, and the contact electrodes are located above the polycrystalline silicon layers and / or the active areas. The semiconductor testing structure is used for WAT testing so as to monitor the thickness of the polycrystalline silicon layers. By utilizing the semiconductor structure for WAT testing, a local device mismatch caused by the over-thick polycrystalline silicon layers can be monitored, and the solution to the problem of low yield loss caused by the local device mismatch is facilitated.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a semiconductor structure used for WAT testing. Background technique [0002] With the development of semiconductor process technology, the technology node of semiconductor process development begins to develop to 55nm, 40nm and below, low voltage (V min ) Yield improvement has become a key issue in the development of new technologies. In 55nm, 40nm and below semiconductor processes, resulting in V min One of the reasons for yield loss is excessive local variation of devices. In order to increase V min Yield finds the local variation of the device and eliminates the local variation of the device. However, finding the local differences of devices has become a technical problem that is difficult to solve at present. [0003] For this problem, due to the limited number of tests, the conventional WAT test method cannot monitor the probability of problems at the level of o...

AI Technical Summary

Problems solved by technology

Due to process problems between the shallow trench isolation structures 1, the thickness of the polysilicon layer will be locally thickened. This problem will cause the polysilicon doping (poly dopant) to fail to reach the predetermined depth, causing the parasitic capacitance of the device to appear, thereby causing an abnormal increase in Vt. and cause localized device mismatch, which ultimately leads to low-voltage yield (V min yield) loss

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