Flip chip stacking packaging structure and packaging method
A packaging structure, flip-chip technology, applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of reducing yield, unable to fill gaps, structural imbalance, etc., to improve product reliability , reduce process steps, avoid warpage and the effect of
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[0035] The invention will be described in detail below in conjunction with the accompanying drawings, but this embodiment is not limited to the present invention, and the structural, method or functional transformations made by those of ordinary skill in the art according to this embodiment are included in the scope of the present invention. within the scope of protection
[0036] See figure 2 , a three-dimensional stack package structure, which includes a PCB substrate 1, a window 2 is arranged on the PCB substrate 1, multi-layer chips 3, 4 are packaged on the PCB substrate 1, and first solder balls 5, 5 are passed between the multi-layer chips 3, 4 The pad 6 is connected, the length of the upper chip 3 in the multi-layer chip is longer than the length of the lower chip 4 in the multi-layer chip, the lower chip 4 in the multi-layer chip is set in the window 2, and the upper chip 3 in the multi-layer chip is connected to the PCB substrate 1 The space is connected by the seco...
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