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Flip chip stacking packaging structure and packaging method

A packaging structure, flip-chip technology, applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of reducing yield, unable to fill gaps, structural imbalance, etc., to improve product reliability , reduce process steps, avoid warpage and the effect of

Inactive Publication Date: 2014-07-02
NAT CENT FOR ADVANCED PACKAGING
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  • Description
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  • Application Information

AI Technical Summary

Problems solved by technology

[0008] 2) Since multiple chips are only on one side of the packaging substrate in the direction, the structure is unbalanced, and the concentration of internal stress in the structure is likely to occur, resulting in warping of the structure and fragmentation of the internal chip
Due to the small gaps between the individual packages and the long distance that the injection molding material needs to flow through, traditional molding materials cannot directly fill these gaps.
In the existing technology, when the chips are stacked, the underfill is used to fill between the layers to discharge the air, and finally the overall plastic sealing is carried out. The increase of the underfill process improves the process steps and reduces the yield, improving the cost of the final

Method used

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  • Flip chip stacking packaging structure and packaging method
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  • Flip chip stacking packaging structure and packaging method

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Embodiment Construction

[0035] The invention will be described in detail below in conjunction with the accompanying drawings, but this embodiment is not limited to the present invention, and the structural, method or functional transformations made by those of ordinary skill in the art according to this embodiment are included in the scope of the present invention. within the scope of protection

[0036] See figure 2 , a three-dimensional stack package structure, which includes a PCB substrate 1, a window 2 is arranged on the PCB substrate 1, multi-layer chips 3, 4 are packaged on the PCB substrate 1, and first solder balls 5, 5 are passed between the multi-layer chips 3, 4 The pad 6 is connected, the length of the upper chip 3 in the multi-layer chip is longer than the length of the lower chip 4 in the multi-layer chip, the lower chip 4 in the multi-layer chip is set in the window 2, and the upper chip 3 in the multi-layer chip is connected to the PCB substrate 1 The space is connected by the seco...

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Abstract

The invention provides a flip stacking packaging structure. Multi-face stacking of chips on a substrate is achieved, balance of the structure after the whole packaging is completed is ensured, warping of the packaging structure and fragmentation of the internal chips are effectively avoided, and the structure comprises a PCB substrate. The PCB substrate is provided with a window, the multiple layers of chips are packaged on the PCB substrate, the multi-layer chips are connected through a first welded ball and a pad, the length of the upper layer of chips in the multiple layers of chips is larger than that of the lower layer of chips in the multiple layers of chips, the lower layer of chips in the multiple layers of chips are sleeved with the window, the upper layer of chips in the multiple layers of chips are connected with the PCB substrate through a second welded ball and a pad, a third welded ball is arranged on the face, corresponding to the second welded ball, of the PCB substrate, the upper layer of chips and the lower layer of chips are connected with the PCB substrate through plastic packaging materials to form a plastic packaging structure, and sealing of the chips is formed. Meanwhile, the invention provides a packaging method of the flip stacking packaging structure.

Description

technical field [0001] The invention relates to the technical field of substrate packaging in the microelectronics industry, in particular to a flip-chip stack packaging structure and packaging method. Background technique [0002] Flip chip, also known as flip chip, deposits tin-lead balls on the I / O pad (signal interface), and then flips the chip to heat and combines the molten tin-lead balls with the substrate. This technology replaces conventional wire bonding and gradually becomes the mainstream of packaging in the future. Compared with COB (Chip on Board), the chip structure and I / O terminals (solder balls) of this package face downward. The / O terminal is distributed on the entire chip surface, so Flip chip has reached the peak in packaging density and processing speed, especially it can be processed by means similar to SMT technology, so it is the ultimate direction of chip packaging technology and high-density installation. [0003] On the other hand, the current d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/00H01L23/31H01L21/50
CPCH01L2924/15151H01L2924/15311H01L2224/16145H01L2224/16225H01L2224/32225H01L2924/3511
Inventor 徐健孙鹏王宏杰陆原
Owner NAT CENT FOR ADVANCED PACKAGING