A test structure for array substrate and its manufacturing method
A technology for testing structures and array substrates, used in instruments, semiconductor devices, circuits, etc., can solve problems such as accumulation of static electricity, large static electricity, and static damage to test structures, to eliminate static electricity accumulation, increase complexity, and prevent electrostatic damage. Effect
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[0045] figure 2 is a top view of the array substrate in this embodiment, as shown in figure 2As shown, the array substrate includes a peripheral area 108 and a display area 109 . In the peripheral area 108, there is a gate test line 101, on which there are source 103, channel layer 104, and drain 102 of the thin film transistor, and the gate of the thin film transistor is a part of the gate test line , the cross-sectional view of the thin film transistor is shown in Figure 7 As shown, there is a gate insulating film 105 on the gate test line 101, a channel layer 104 on the gate insulating film 105, and a source electrode 103 and a drain electrode 102 covering part of the channel layer on the channel layer 104, Finally, there is a protection layer 106 on the source and drain electrodes.
[0046] A more detailed partial diagram of the gate test line is shown in image 3 As shown, the gate test line 101 is composed of a plurality of gate test line segments 101-1 separated ...
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