Embedded germanium-silicon epitaxy dislocation fault improving method

Abstract

The invention discloses an embedded germanium-silicon epitaxy dislocation fault improving method. The method includes the following steps that firstly, the source and drain of a PMOS device are removed in an etching mode; secondly, a germanium-silicon seed crystal transition layer is arranged on a groove where the source and the drain are removed in the etching mode in a deposition mode, wherein the mass percent of germanium in the germanium-silicon seed crystal transition layer ranges from 5% to 10%, and the film layer thickness of the germanium-silicon seed crystal transition layer ranges from 15 nm to 30 nm; thirdly, a germanium-silicon source and a germanium-silicon drain are arranged on the germanium-silicon seed crystal transition layer in a deposition mode. Boundary surfaces between the germanium-silicon source and germanium-silicon drain of the PMOS device prepared through the embedded germanium-silicon epitaxy dislocation fault improving method and a substrate are clear and smooth, dislocation faults are greatly improved, and stress relaxation is alleviated.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for improving embedded silicon germanium epitaxial dislocation defects. Background technique [0002] As we all know, the performance of CMOS circuits is largely limited by that of PMOS. Therefore, any technology that can improve the performance of PMOS to the level of NMOS is considered to be beneficial. see image 3 , image 3 The schematic diagram of the PMOS structure of the SiGe source / drain implantation straining technology is shown. In the second PMOS device 2 of 90nm, the researchers of Intel etched and removed the source and drain of the device, and then redeposited the silicon germanium layer, so that the second source 21 and the second drain 22 would be opposite to all The second channel 23 generates a compressive stress, thereby improving the transmission characteristics of the second PMOS device 2 . [0003] As known to those skilled in the art, th...

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Problems solved by technology

[0007] The present invention is aimed at the conventional PMOS device in the prior art, which inevitably has certain defects on the trench surface after cleaning, resulting in defect sources at the interface after epitaxial growth, and serious defects may continue to the growth surface of silicon germanium, etc. Provide a method for improving dislocation defects in embedded germanium silicon epitaxy

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