SAR real-time imaging processing method based on FPGA and multiple DSPs

A processing method and real-time imaging technology, applied in the direction of reflection/re-radiation of radio waves, utilization of re-radiation, measurement devices, etc., can solve the problems of long processing time, low DSP parallelism, unreasonable allocation of DSP resources, etc. High-precision, time-saving effects

Inactive Publication Date: 2014-08-27
XIDIAN UNIV
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Problems solved by technology

[0005] Traditional SAR real-time imaging processing uses multi-chip DSP parallel technology, which often has disadvantages such as unreasonable allocation of DSP resources, low paral...

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  • SAR real-time imaging processing method based on FPGA and multiple DSPs
  • SAR real-time imaging processing method based on FPGA and multiple DSPs
  • SAR real-time imaging processing method based on FPGA and multiple DSPs

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Embodiment Construction

[0024] The present invention will be further described below in conjunction with accompanying drawing:

[0025] The invention proposes a SAR real-time imaging processing device based on FPGA and multiple DSPs. refer to figure 1 , is a schematic structural diagram of a SAR real-time imaging processing device based on FPGA and multiple DSPs. This SAR real-time imaging processing device based on FPGA and multi-DSP comprises FPGA chip, host computer, the first DSP chip to the eighth DSP chip; The output end of FPGA chip is electrically connected the input end of the first DSP chip (FPGA chip and the first DSP chip The data transfer rate between the chips is 300MB / s); the first DSP chip is electrically connected to the third DSP chip, the fourth DSP chip and the seventh DSP chip respectively; the output terminal of the first DSP chip is electrically connected to the input of the eighth DSP chip terminal, the eighth DSP chip is electrically connected to the second DSP chip, the fi...

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Abstract

The invention belongs to the technical field of radar real-time imaging processing, and particularly relates to an SAR real-time imaging processing method based on an FPGA and multiple DSPs. The processing method includes the following steps that echo data are pre-processed by means of an FPGA chip, so that subaperture data are obtained; the subaperture data are sent to the first DSP sequentially by means of the FPGA chip and are alternately forwarded to the third DSP, the fourth DSP and the seventh DSP by means of the FPGA chip for Doppler center estimation, range migration correction, Doppler rate estimation and motion parameter estimation, and the processed data are forwarded to the eighth DSP sequentially through the first DSP; each subaperture datum is divided into three blocks in the range direction through the eighth DSP and the three blocks of each subaperture datum are sent to the second DSP, the fifth DSP and the sixth DSP respectively for motion parameter fitting, phase compensation, direction pulse pressure and multiview processing, so that corresponding blocked image data are obtained; the blocked image data are transmitted to the eighth DSP for image quantization and image splicing processing, and ultimately an SAP image is obtained.

Description

technical field [0001] The invention belongs to the technical field of radar real-time imaging processing, in particular to a SAR real-time imaging processing method based on FPGA and multiple DSPs. Background technique [0002] Synthetic Aperture Radar (SAR) has the characteristics of all-day, all-weather, long-distance and high-resolution imaging. An important function of SAR is imaging, which has been widely used in military and civilian fields. With the continuous development of digital signal processing technology and synthetic aperture radar imaging algorithm, the real-time processing of synthetic aperture radar echo signals and the realization of high-resolution real-time imaging have become a new research hotspot. [0003] As a specialized microprocessor, DSP is mainly used for calculation. The advantage is the flexibility of the software, which is suitable for conditional processes, especially complex multi-algorithm tasks. DSP is programmed through assembly or hig...

Claims

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Application Information

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IPC IPC(8): G01S13/90
CPCG01S7/32G01S13/90G01S13/9004
Inventor 梁毅马倩刘士杰邢孟道王虹现
Owner XIDIAN UNIV
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