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A method for determining the boundaries of wafer test data specifications and a method for marking die

A technology of wafer testing and data specification, which is applied in the semiconductor field, can solve problems such as unsatisfactory, discarding, and improving, and achieve the effects of reducing the probability of error, improving production efficiency, and reducing waste

Active Publication Date: 2017-10-20
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] It can be seen that, in the prior art, the above-mentioned method of marking the die by tightening the scope of the wafer test specification, because all the wafers use the same wafer test specification limit (generally the best wafer is the benchmark), that is, using the static wafer test specification boundaries, so it is impossible to distinguish the "baseline (baseline) grains" and "critical tails (marginal tails) grains" of each wafer in a targeted manner, resulting in common die Many baseline (baseline) dies that were originally "qualified products" on the circle are marked as "non-conforming products" and discarded, which is not conducive to the improvement of product yield, and is not conducive to reducing the cost of the fab
That is to say, the method for determining the limit of the wafer test data specification in the prior art is not conducive to the improvement of the product yield, and has been unable to meet actual needs; correspondingly, using the method for determining the wafer test data specification in the prior art The method of determining the boundary of the wafer test data specification and the grain marking method of the boundary can no longer meet the actual needs.

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  • A method for determining the boundaries of wafer test data specifications and a method for marking die
  • A method for determining the boundaries of wafer test data specifications and a method for marking die
  • A method for determining the boundaries of wafer test data specifications and a method for marking die

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Embodiment 1

[0035] This embodiment provides a method for determining the limits of wafer test data specifications, wherein the method determines corresponding limits of wafer test data specifications for different wafers. That is to say, this embodiment adopts a method of dynamically determining the limit of the wafer test data specification to determine the limit of the wafer test data specification, which is different from the method of statically determining the limit of the wafer test data specification in the prior art. (That is, the method of using the same wafer test data specification for all wafers) is obviously different, which is conducive to improving the yield of the die on the wafer.

[0036] For ease of understanding, the relevant concepts are clarified as follows: "Wafer test data" (also known as "WS" data) refers to the testing (mainly electrical testing) of dies (generally all dies) on a certain wafer. ) after the test data obtained. The wafer test data specification re...

Embodiment 2

[0065] This embodiment provides a die marking method, that is, according to the wafer test data and the wafer test data specifications (including Dies that are substantially unqualified for some electrical tests, and dies that have passed various electrical tests but are considered "failures" due to reliability and other considerations) are marked.

[0066] The grain marking method of the present embodiment comprises the following steps:

[0067] Step E1: Determine the limit of the wafer test data specification; wherein, the method for determining the limit of the wafer test data specification is implemented by using the method for determining the limit of the wafer test data specification described in the first embodiment.

[0068] Step E2: marking the die whose wafer test data of the wafer falls outside the limits of the corresponding wafer test data specification as defective.

[0069] The die marking method of the embodiment of the present invention has various advantages...

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Abstract

The invention provides a method of determining a boundary of wafer test data standard and a crystal grain marking method, and relates to the technical field of semiconductors. The method of determining the boundary of wafer test data standard can determine corresponding wafer test data standard boundaries in view of different wafers respectively. The crystal grain marking method comprises steps: S101, the boundary of wafer test data standard is determined, wherein the method of determining the boundary of wafer test data standard is realized by adopting the above method; and S102, crystal grains when the wafer test data falls out of the boundary of the corresponding wafer test data standard are marked to be unqualified products. According to the method of determining the boundary of wafer test data standard, as a dynamic method is adopted to determine the boundary of wafer test data standard, the yield of crystal grains on the wafer can be improved. According to the crystal grain marking method, the above method is adopted to determine the boundary of wafer test data standard, and the crystal grain marking method is also provided with the above advantages.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for determining the limit of wafer test data specifications and a method for marking crystal grains. Background technique [0002] In the field of semiconductor technology, wafer sorting (wafer sort, WS for short) is the first process for distinguishing qualified products from unqualified products in the back-end of semiconductors. Wafer testing is mainly a test process in which a series of electrical tests are performed on each die on the wafer to determine whether the die is good or bad after the semiconductor device is manufactured and before dicing and packaging. Typically, the customer will provide a test plan for wafer testing, and each electrical test will generate corresponding electrical test data (called "wafer test data" or "WS" data). Moreover, customers will also provide static wafer test data specifications (specifications), also known as wafer test...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66G01R31/26
CPCH01L22/10H01L22/14H01L22/20
Inventor 林光启陈旭波
Owner SEMICON MFG INT (SHANGHAI) CORP
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