Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

pmos transistor and its manufacturing method

A manufacturing method and transistor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of slow carrier migration rate of PMOS transistors, reduce leakage current, increase migration rate, and avoid surface The effect of defects

Active Publication Date: 2017-05-17
SEMICON MFG INT (SHANGHAI) CORP
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is to improve the problem that the carrier mobility rate of the PMOS transistor is too slow

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • pmos transistor and its manufacturing method
  • pmos transistor and its manufacturing method
  • pmos transistor and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0036] As mentioned above, in order to increase the compressive stress applied to the channel, when the present invention fills the sigma-shaped groove of the source / drain region with silicon-germanium material, the surface of the silicon-germanium material is higher than the surface of the silicon substrate to increase the silicon-germanium material. Filling amount of germanium material. In addition, in the semiconductor process, in addition to making PMOS transistors, other semiconductor devices, such as NMOS transistors, need to be formed in other areas of a wafer. Therefore, when performing ion implantation on the wafer to form the lightly doped region of the PMOS transistor, other The area needs to be covered with photoresist to protect it, and after the shallow junction is made, this photoresist residue needs to be removed. In order to prevent the above cleaning process from corroding the SiGe material, the present invention covers the side of the SiGe material with a pr...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a PMOS (P-channel metal oxide semiconductor) transistor and a manufacture method thereof. In order to increase pressure stress applied to trenches, sigma-shaped trenches of a source-drain region are filled with silicon-germanium material so that the surface of the silicon-germanium material is higher than that of a silicon substrate and that more silicon-germanium material is applied; in addition, during a semiconductor process, except that the PMOS transistor is made for a wafer, other semiconductor devices, such as an NMOS (N-channel metal oxide semiconductor) transistor, need to be made in other regions; accordingly, when ion implantation is performed on a wafer to form a light-doped region of the PMOS transistor, other regions need to be covered for protection with photoresist, and after a shallow junction is made, residue of the photoresist needs to be removed; the side of the silicon-germanium material is covered with a protective layer to prevent the silicon-germanium material from being corroded during a cleaning process, and carrier mobility is increased.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, in particular to a PMOS transistor and a manufacturing method thereof. Background technique [0002] With the improvement of integrated circuit integration, the size of semiconductor devices is gradually scaled down. In the process of scaling down the size of semiconductor devices, the drain voltage does not decrease accordingly, which leads to the gap between the source and drain. The electric field in the track area increases, and under the action of a strong electric field, electrons will accelerate to a speed many times higher than the speed of thermal motion between two collisions. Because the kinetic energy of electrons is very large, the electrons are called hot electrons, which cause hot electrons Effect (hot electron effect). The hot electron effect will cause hot electrons to be injected into the gate dielectric layer, forming gate electrode current and substrate current, thu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66636H01L29/7848
Inventor 刘佳磊
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products