Method for matching digital video signal transmission format of infrared thermal imaging machine core
An infrared thermal imaging and digital video technology, applied in the field of image transmission, can solve the problems of difficulty in secondary development and poor versatility, and achieve the effects of fast computing speed, strong versatility and simple interface
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Embodiment 1
[0039] Embodiment 1: Taking a 16-bit interface bus as an example, one pixel outputs RGB666 format in two clock cycles. The final color image output data format requirements are as follows:
[0040]
[0041] Proceed as follows:
[0042] 1. Configure the pseudo color table,
[0043] For the color data format, since the data output by the infrared sensor is a grayscale format with only black and white colors, the subsequent output data uses grayscale to define the color, and the grayscale data needs to be converted into data in a color format. In this embodiment, the output RGB666, the data conversion table of this embodiment is actually a pseudo-color table, quantized into the following format, the present embodiment uses 8-bit original grayscale format, and the format after pseudo-color conversion is RGB888.
[0044]
[0045] 2. Configure the pixel clock cycle register as 2 clock cycles per pixel
[0046] 3. Configure the output hardware interface line mapping table
...
Embodiment 2
[0054] Embodiment 2: Taking an 8-bit interface bus, one pixel outputs the YCbCr444 format in three clock cycles as an example.
[0055] The format requirements are as follows:
[0056]
[0057] Proceed as follows:
[0058] 1. Configure the pseudo color table, because the output is in YCbCr format, the format is as follows
[0059]
[0060] 2. Configure the pixel clock period register as 3 clock periods per pixel;
[0061] 3. Configure the interface bus mapping table
[0062] The mapping table is set as 32 5-bit registers in this example, marked as:
[0063] MAP_IDXi (i = 0,1,2...31), the subscript i is the value of the register;
[0064] Register values 0~23 respectively correspond to the data bits after pseudo-color transformation in 1. Register values 24~27 are mapped to data 0, register values 28~31 are mapped to data 1,
[0065] Among them, MAP_IDX0~MAP_IDX7 correspond to the first clock cycle;
[0066] Among them, MAP_IDX8~MAP_IDX15 correspond to the seco...
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