A 12-tube sram unit circuit that improves read noise margin and write margin at the same time

Abstract

The invention discloses a novel 12-tube SRAM (Static Random Access memory) unit circuit capable of simultaneously increasing read noise tolerance and writing margin, and the novel 12-tube SRAM unit circuit can eliminate a partial-select problem and solve a read partial-select problem and a writing partial-select problem, a stability problem cannot be caused, and additionally, no additional power is consumed. Experiments measure that compared with a traditional 6T unit, the read dynamic power consumption and the writing dynamic power consumption of an array with the total number of 128 are respectively reduced by 81.3% and 88.2% when a column decoding unit (CMUX) is 4; additionally, according to the circuit, the read noise tolerance is greatly increased, so that the read noise tolerance is similar to the noise tolerance in a hold mode and reaches 2.3 times of that of the traditional 6T unit; in addition, according to the circuit, a feedback structure of a phase inverter is interrupted, so that the writing margin is increased and reaches 1.41 times of that of a traditional 6T SRAM unit.

Description

technical field [0001] The invention relates to the technical field of circuits, in particular to a novel 12-tube SRAM unit circuit which simultaneously improves read noise tolerance and write margin. Background technique [0002] High speed and low power consumption are the focus of today's SRAM (Static Random Access Memory) design, while improving a certain performance may affect another performance to make it worse. With the continuous reduction of process size, the continuous decrease of power supply voltage and the increase of storage capacity, the soft error rate of memory will become higher and higher, and the reliability and yield of SRAM are facing challenges. However, traditional error correction coding (ECC) can only solve single-bit soft errors. When the process node enters the nanoscale, the probability of multi-bit soft errors will increase exponentially. To solve this problem, bit-interleaved array structures are widely used. However, the use of the bit inte...

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Problems solved by technology

[0007] The purpose of the present invention is to provide a novel 12-tube SRAM unit circuit that improves read noise tolerance and write margin simultaneously, solves the problem of extra power consumption caused by the half-selection problem and the stability destruction problem caused by the half-selection problem, and at the same time Improve read and write performance

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