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Junctionless transistor and manufacturing method thereof

A technology of a junctionless transistor and a manufacturing method, which is applied in the manufacture of semiconductor/solid-state devices, semiconductor devices, electrical components, etc., can solve problems such as deterioration of transistor switching performance

Active Publication Date: 2015-01-21
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Improving performance by reducing the physical size of conventional field effect transistors has faced some difficulties due to the short channel effect and gate leakage current problems at small sizes that deteriorate the switching performance of transistors

Method used

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  • Junctionless transistor and manufacturing method thereof
  • Junctionless transistor and manufacturing method thereof
  • Junctionless transistor and manufacturing method thereof

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Embodiment Construction

[0031] Although the nanowire field effect transistor in the prior art suppresses the short channel effect, the driving current is small and the performance is not good enough.

[0032] In order to make the above objects, features and advantages of the present invention more comprehensible, specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0033] In order to solve the problems of the prior art, the present invention provides a junctionless transistor and its manufacturing method, forming a nanowire with doped ions as the channel region of the junctionless transistor, and the channel dopant ion in the nanowire is The concentration gradually decreases from the nanowire surface to the center. The nanowire structure can suppress the short channel effect, and the higher ion doping concentration on the surface of the nanowire can make the junction-free transistor have a larger driving current, thereby opti...

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PUM

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Abstract

The invention discloses a junctionless transistor and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a substrate, wherein the substrate comprises a dielectric layer, and a first semiconductor layer arranged on the dielectric layer; imaging the first semiconductor layer to form a source region, a drain region, and a fin between the source region and the drain region; removing partial dielectric layer below the fin so that the fin is suspended on the residual dielectric layer; smoothing the surface of the fin to form a nanowire; performing channel ion doping on the nanowire so that the ion doping concentration is gradually decreased from the nanowire surface to the nanowire center; forming a ring fence structure on the doped nanowire; and performing the source-drain doping which is similar to the nanowire channel ion doping on the source region and the drain region to form a source electrode and a drain electrode. The performance of the junctionless transistor is optimized through the adoption of the method disclosed by the invention.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a junctionless transistor and a manufacturing method thereof. Background technique [0002] In order to keep pace with Moore's Law, the feature size of semiconductor devices (such as field effect transistors) has been continuously reduced. Improving performance by shrinking the physical size of conventional field-effect transistors has faced some difficulties due to the problems of short channel effects and gate leakage currents at small sizes that degrade the switching performance of transistors. [0003] In order to suppress the short-channel effect, a nanowire field-effect transistor (Nanowire Field-Effect Transistor, NWFET) technology has been developed in the prior art. [0004] NWFET has a one-dimensional nanowire channel. Due to the quantum confinement effect, the carriers in the channel are distributed on the surface, so the carrier transport is less affected by s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/10
CPCH01L29/1033H01L29/105H01L29/66439H01L29/775H01L29/78696
Inventor 肖德元
Owner SEMICON MFG INT (SHANGHAI) CORP