Stackable sensor chip structure and preparation method thereof
A sensor chip and stacking technology, which is applied in the field of stacked sensor chip structure and its preparation, can solve the problems of small photosensitive area and weak isolation of pixels, and achieve the effects of improving shooting effect, increasing area, and improving photosensitive performance
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[0043] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.
[0044] Figure 9 It is a schematic structural diagram of a stacked sensor chip in an embodiment of the present invention; as Figure 9 Shown:
[0045] This embodiment relates to a stacked sensor chip structure, which can be applied to 2T, 4T and 8T image sensors or other pixel area structures, specifically including: a logic device wafer 2 and a conversion layer covering the upper surface of the logic device wafer 2 A device wafer 3 and an inverted pixel device wafer 1 covering the upper surface of the conversion device wafer 3; a plurality of transmission gates 13 are arranged on the pixel device wafer 1, and a row selection device 35 is arranged on the conversion device wafer 2 , a source follower device 34 and a reset device 33; the gate of the source follower device 34 and the drain of the...
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