Single-stage folding interpolation assembly line type analog-digital converter with redundancy bit

Abstract

The invention belongs to the technical field of integrated circuits, in particular to a single-stage folding interpolation assembly line type analog-digital converter with a redundancy bit. The analog-digital converter consists of a single track-and-hold grid voltage bootstrapped switch, a reference voltage resistance string, M levels of (N+0.5) bits quantized folding and interpolating sub analog-digital converters, a digital coding circuit and a binary digital code output drive circuit module; each (N+0.5) bits quantized folding and interpolating sub analog-digital converter consists of a preamplifier array, a folder array, an offset averaging and interpolating shared resistance network, a comparer array and an effective signal path option switch. According to a (N*M) assembly line structure, an index relationship between hardware expenditure and design precision is simplified into a linear relationship, meanwhile, non-linear factors in a traditional assembly line structure are abandoned, the sampling speed of the analog-digital converter is improved, the power consumption of the analog-digital converter is lowered, and the single-stage folding interpolation assembly line type analog-digital converter with the redundancy bit is favorable for realizing the single-channel analog-digital converter with ultrahigh speed and high energy efficiency.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a single-stage folding and interpolation pipeline analog-to-digital converter with redundant bits. Background technique [0002] The traditional pipelined analog-to-digital converter structure is as follows figure 1 As shown, it is mainly composed of a single gate voltage bootstrap switch 5, pipeline sub-analog-to-digital converter stages 6, 7, 8, 9, a digital encoding circuit 10 and a binary digital code output driving circuit 11. The pipeline sub-ADC stage mainly includes: a sub-sampling and holding switch 1 , a sub-ADC 2 , a sub-DAC 3 and a margin operational amplifier circuit 4 . [0003] The detailed structure of the traditional pipeline-level sub-ADC is as follows: figure 2 As shown, it is mainly composed of a resistor string reference voltage generation circuit 12, a sub-ADC comparator array 13, a switch array 15 in the sub-DAC, a sampling signal...

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Problems solved by technology

[0007] (2) This structure requires a margin budget amplifier, and the power consumption is high

[0011] To sum up, the traditional pipeline structure is greatly limited in terms of power consumption and sampling speed due to the need for closed-loop margin operational amplifiers, which is not conducive to the design and implementation of ultra-high-speed and low-power analog-to-digital converters.

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