A radiation-resistant d-flip-flop circuit based on triple-interlock unit

Abstract

The invention discloses an anti-radiation D flip-flop circuit based on three mutual-latching units. The anti-radiation D flip-flop circuit comprises a clock signal generation circuit, a D input filter circuit, C unit circuits, a voting circuit, a primary mutual-latching circuit and a secondary mutual-latching circuit. The C unit circuits include a first C unit circuit, a second C unit circuit and a third C unit circuit. Clock signals are generated after an external clock signal CK passes through the clock signal generation circuit, data signals are generated after an external data signal D passes through the D input filter circuit, data signals, output after the clock signals and the data signals pass through the primary mutual-latching circuit, the secondary mutual-latching circuit and the C unit circuits, passes through the voting circuit to output an output signal Q of a whole flip-flop. The anti-radiation D flip-flop circuit has the advantages that a three mutual-latching circuit reinforcement technology is adopted, output stability and reliability of the whole D flip-flop circuit can be guaranteed in case of overturning of the D flip-flop circuit due to interference such as radiation, and anti-radiation capability of the D flip-flop circuit is greatly improved.

Description

technical field [0001] The invention relates to the design of an anti-radiation circuit, in particular to an anti-radiation D flip-flop circuit based on a three-interlock unit. Background technique [0002] With the advancement of integrated circuit manufacturing technology, the reduction of device size and the improvement of operating speed, the impact of radiation on circuits has become more and more serious. The main impact of radiation on digital circuits is reflected in the single event effect and total dose effect. As deep submicron MOS devices become mainstream, especially when the process node of MOS circuits reaches below 65nm, the single event effect has become the most important factor affecting MOS devices. radiation effect. Single event effects are mainly divided into single event transients and single event upsets. [0003] In the radiation environment, MOS integrated circuits are bombarded by high-energy charged particles, especially the circuits in aerospac...

AI Technical Summary

Problems solved by technology

However, the main disadvantage of the three-mode redundancy and double interlock circuit reinforcement technology is that the reliability is not high. Assuming that the flip-flop without circuit-level reinforcement technology has a flip probability of , under the premise of not considering the correlation of sensitive nodes and the tolerance difference of nodes to injected charges, after adopting three-mode redundancy reinforcement, the flip-flop output flip probability drops to , and the flip-flop flip probability using double interlock hardening technology is

Therefore, in order to ensure the normal operation of the circuit for a long time, a combination of circuit-level dual-interlock reinforcement and system-level triple-mode redundancy reinforcement is generally used, and this method will inevitably bring about a decrease in circuit area and power consumption. Doubling, it will also deteriorate the timing performance of the circuit and reduce the operating frequency

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