A pipelined analog-to-digital converter and its capacitance mismatch error calibration method

Abstract

The embodiment of the present invention discloses a simple calibration scheme for the capacitance mismatch error of the pipeline analog-to-digital converter. On the basis of the traditional non-calibration pipeline analog-to-digital converter structure, it consists of a stage MDAC structure and a stage calibration switch structure that needs to be calibrated The calibration stage of the capacitance mismatch error, meanwhile, increases the digital calibration circuit of the capacitance mismatch error. During the calibration stage capacitance error extraction work, two specific inputs are given to the calibration stage sampling capacitor through the stage calibration switch structure, and two digital codes containing capacitance mismatch errors are obtained, and then the calibration stage capacitance mismatch error is extracted based on them And perform digital calibration. The capacitance mismatch error calibration solution has an extremely simple structure, extremely few additional components, and extremely simple timing control, and can effectively calibrate the problem of static characteristic degradation caused by capacitance mismatch.

Description

technical field [0001] The invention relates to an analog-to-digital converter used in an infrared focal plane array readout circuit, in particular to a pipelined analog-to-digital converter and a capacitance mismatch error calibration method thereof. Background technique [0002] The readout circuit (ROIC) is one of the key components of the uncooled infrared focal plane array (IRFPA). Its main function is to preprocess the weak signal induced by the infrared detector (such as integration, amplification, filtering, sampling / holding, etc.) ) and parallel / serial conversion of array signals. Depending on the material used and the working method of the detector, the structure of the readout circuit changes accordingly to obtain the maximum signal-to-noise ratio (SNR) while meeting the requirements of the frame rate. [0003] ROIC belongs to digital-analog hybrid integration technology. The pixel circuit part is an analog circuit, which has special requirements for the channel...

AI Technical Summary

Problems solved by technology

[0005] In the classic non-calibration pipelined ADC, capacitance mismatch error is unavoidable due to the manufacturing process, which to some extent limits the effective trade-off between resolution and sampling rate, especially in large arrays, In the readout technology of high frame rate uncooled infrared focal plane array, there are limitations of higher resolution and higher sampling rate

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