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EtherCAT dual-network data reading and writing system and method thereof

A technology of data reading and writing and data, which is applied in the field of EtherCAT dual-network data reading and writing system, which can solve the problems of long-term occupation of the bus of the main control chip, the decline of real-time performance of the control system, and the impact on the real-time performance of the control system, so as to shorten the waiting time , reduce overhead, and run faster

Active Publication Date: 2015-03-04
STATE GRID CORP OF CHINA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, when the main control chip is directly connected to the ESC chip, there will be some problems. Take the commonly used ESC chip ET1100 as an example to illustrate: 1. ET1100 will output a low-level interrupt signal every network cycle. The chip generally starts reading / writing network data by detecting the falling edge of the interrupt signal. Finally, the main control chip needs to read / write data to a specific address of the ET1100 in order to set the interrupt signal of the ET1100 to high level and clear the interrupt signal
If the main control chip does not read / write data to the specific address of ET1100 in time, the main control chip may disconnect the network because it cannot detect the falling edge of the interrupt signal; 2. The PDI interface speed of ET1100 is generally several hundred nanoseconds. It can read / write a 16-bit data, which is much slower than the main control chip reading / writing a 16-bit data in ten nanoseconds. Therefore, when the main control chip directly reads / writes ET1100, it needs to wait continuously. When the transmitted data is large , the bus of the main control chip will be occupied for a long time, which will affect the real-time performance of the control system; 3. When the design method of dual redundant EtherCAT network is adopted, the communication overhead of the main control chip will be further increased, making the overall control system real-time decline

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  • EtherCAT dual-network data reading and writing system and method thereof
  • EtherCAT dual-network data reading and writing system and method thereof

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Embodiment Construction

[0049] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0050] Such as figure 1 As shown, the present invention provides a FPGA-based EtherCAT dual-network data reading and writing system, and the FPGA selects the Spartan series of Xilinx Company, with a programmable Block RAM inside. The main control chip is TI's C2000 series DSP, which supports 16-bit data bus; the ESC chip is Beckhoff's ET1100 chip. Connect the FPGA to the bus interface of the main control chip, ESC chip ET1100 (A network) and ESC chip ET1100 (B network). The address bus and data bus are both 16 bits.

[0051] FPGA internal function module of the present invention is specifically as follows:

[0052] Asynchronous parallel bus interface module; dual-port RAM1 module with ping-pong control; dual-port RAM2 module; EtherCAT read and write control (A network) module; configuration information module; dual-por...

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Abstract

The invention relates to an EtherCAT dual-network data reading and writing system and a method thereof, wherein the system comprises an asynchronous parallel bus interface module, a data cache region, an EtherCAT reading and writing control module, a configuration information module and an interruption pulse synthesis module; the data cache region comprises an A-network data cache region and a B-network data cache region; the system is connected with a master control chip and an ESC chip respectively; the method comprises a starting method, an EtherCAT data reading method and an EtherCAT data writing method. The EtherCAT dual-network data reading and writing system and the method thereof improve the reliability of communication and the real time nature of the whole master control system. The EtherCAT dual-network data reading and writing system and the method thereof avoid the problem that the master control chip cannot further respond to an ET1100 interruption signal of the ESC chip due to losing a falling edge of the interruption signal once.

Description

technical field [0001] The invention relates to a dual-network data reading and writing system, in particular to an EtherCAT dual-network data reading and writing system and a method thereof. Background technique [0002] EtherCAT is a real-time industrial Ethernet fieldbus technology based on standard Ethernet technology. It was originally developed by Beckhoff in Germany. It has the characteristics of large transmission capacity, fast transmission speed, high real-time performance, low implementation cost, and flexible topology. , In recent years, EtherCAT technology has been widely used in the field of industrial automation control. With the continuous advancement of technology, the reliability of the real-time control system using a single EtherCAT network has reached a very high level, which can fully meet the requirements of most scale and low-risk industrial control, but for some high-risk, high-value , Large-scale industrial control is far from enough, especially in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/17
Inventor 王翔蔡林海
Owner STATE GRID CORP OF CHINA