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TDM-based network clock recovery system

A technology for recovering system and network clocks, which is applied in the field of network communication and can solve problems such as poor recovery accuracy, loss of clock information, and long recovery time

Active Publication Date: 2015-03-25
CHENGDU LONGRAISE TECH DEV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] such as As shown in Figure 1, CES (Circuit Emulation Service) circuit emulation provides a smooth transition solution from the circuit switching network to the packet switching network. The PE device at the sending end encapsulates the TDM data in real time, and transmits it to the receiver through the packet network. At the receiving end, the data buffer queue of the PE device at the receiving end restores the synchronous clock, and the synchronous clock decapsulates the data frame and reassembles it into a TDM data stream; but because the TDM network is a synchronous network, the packet network is a typical asynchronous network, and the TDM data It will cause the loss of its own clock information when it is transmitted to the receiving end through the packet network. Therefore, the clock recovery technology is very important when recovering TDM data at the receiving end. The recovery of data clock information directly affects the quality of data transmission. The current clock recovery technology There are problems such as long recovery time and poor recovery accuracy

Method used

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  • TDM-based network clock recovery system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0082] Example 1: like figure 2 As shown, this embodiment provides a TDM-based network clock recovery system with high recovery accuracy and short recovery time; it includes a data clock branching module 1, a data cache module 2, a clock recovery module 3, and a parallel-serial processing module 4 The data clock splitting module 1 is connected to the data cache module 2 and the clock recovery module respectively;

[0083] The data clock branching module 1 is used to send the control word part of the network data received from the packet network to the clock recovery module 3 .

[0084] The data cache module 2 is used for sorting and packet loss processing of the network data.

[0085] The clock recovery module 3 is used to receive the control word part of the network data, and calculate and adjust the recovered clock of the network data.

[0086] The parallel-serial processing module 4 is used to perform parallel-serial processing on the sorted and packet loss-processed n...

Embodiment 2

[0103] Example 2: This embodiment also provides a TDM-based network clock recovery method with high recovery accuracy and short recovery time, such as Figure 5 As shown, the following steps are included: Step S100 is included: encapsulating the network data to be transmitted according to the specified number of frames.

[0104] Including step S200: separating the control word part from the received network data, and calculating and adjusting the recovered clock.

[0105] Step S300 is included: sorting and discarding received network data.

[0106] Step S400 is included: performing parallel-serial processing on the sorted and packet loss-processed network data and the calculated and adjusted recovered clock frequency, so as to realize the clock recovery of the network data.

[0107] Further, such as Image 6 As shown, in the step S200 of extracting the timing sequence number from the control word part and counting according to the current recovered clock: including step S2...

Embodiment 3

[0162] Example 3:This embodiment also provides a TDM-based network clock recovery method with high recovery accuracy and short recovery time, such as Figure 5 As shown, the following steps are included: Step S100 is included: encapsulating the network data to be transmitted according to the specified number of frames.

[0163] Including step S200: separating the control word part from the received network data, and calculating and adjusting the recovered clock.

[0164] Step S300 is included: sorting and discarding received network data.

[0165] Step S400 is included: performing parallel-serial processing on the sorted and packet loss-processed network data and the calculated and adjusted recovered clock frequency, so as to realize the clock recovery of the network data.

[0166] Further, such as Image 6 As shown, in the step S200 of extracting the timing sequence number from the control word part and counting according to the current recovered clock: including step S21...

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PUM

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Abstract

The invention relates to the field of network communications, in particular to a TDM-based network clock recovery system. The system comprises a data clock dividing module, a data caching module, a clock recovery module and a parallel-to-serial processing module; the data clock dividing module is connected with the data caching module and the clock recovery module; the data caching module and the clock recovery module are connected with the parallel-to-serial processing module. The TDM-based network clock recovery system adopts data ranking and clock recovery division processing, and the processing speed is higher; data ranking adopts the method that data are directly stored at corresponding positions according to serial numbers, the ranking efficiency is higher, and the functions of lost packet and invalid packet processing and counting are achieved; meanwhile, data clock self-adaptive recovery is achieved by the adoption of the sampling and counting mode for the data serial numbers, the needed time for recovery is short, and the recovery precision is high; in the process of adjusting a clock, the discrete pulse insertion mode is adopted, so that the clock is adjusted more stably, the clock pulse jitter is small, and the 2.048MHz clock recovery precision realized by the adoption of the system reaches up to 10 ppb, and the requirement for the network data receiving and sending synchronization is better met.

Description

technical field [0001] The invention relates to the field of network communication, in particular to a TDM-based network clock recovery system. Background technique [0002] like figure 1 As shown, CES (Circuit Emulation Service) circuit emulation provides a smooth transition solution from the circuit switching network to the packet switching network. The PE device at the sending end encapsulates the TDM data in real time, and transmits the TDM data to the receiving end through the packet network. At the receiving end, the PE The data buffer queue at the receiving end of the device recovers the synchronous clock, and the synchronous clock decapsulates the data frame and reassembles it into a TDM data stream; however, because the TDM network is a synchronous network, and the packet network is a typical asynchronous network, TDM data is transmitted through the packet network to At the receiving end, it will cause its own clock information to be lost. Therefore, the clock reco...

Claims

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Application Information

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IPC IPC(8): H04J3/06
Inventor 胡强吴援明
Owner CHENGDU LONGRAISE TECH DEV