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Built-in self-testing method and application of integrated circuit

A built-in self-test, integrated circuit technology, applied in the direction of electronic circuit testing, etc., can solve the problems of long test time, high fault coverage, difficult to reach, etc.

Inactive Publication Date: 2015-04-15
SOUTH CHINA NORMAL UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Moreover, the existing built-in self-test method is difficult to achieve a high fault coverage (for example, 100% fault coverage) or requires a long test time

Method used

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  • Built-in self-testing method and application of integrated circuit
  • Built-in self-testing method and application of integrated circuit
  • Built-in self-testing method and application of integrated circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0075] The main process of the method provided by the invention is:

[0076] (1) For a given circuit under test, according to the structure of the circuit, establish a binary decision diagram corresponding to the normal circuit.

[0077] (2) Inject a fault into the normal circuit, obtain the fault circuit, and establish a binary decision diagram corresponding to the fault circuit.

[0078] (3) XOR the two binary decision graphs corresponding to the normal circuit and the faulty circuit to obtain a test binary decision graph, and find out the binary decision graph from the root node to the attribute value 1 For all the paths of the terminal point, the value of the variable corresponding to the edge on each such path is the test vector of the fault.

[0079] (4) Repeat steps (2) and (3) until the test vectors that can detect the s-a-0 and s-a-1 faults of each signal line in the circuit are obtained; combine these test vectors together to form a test of the circuit set.

[008...

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PUM

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Abstract

The invention discloses a built-in self-testing method and application of an integrated circuit. The built-in self-testing method comprises the following steps: generating all the test vectors of each fault in the circuit by using a binary decision diagram, and obtaining a circuit test set with a minimum scale through selecting the test vectors; directly using the circuit test set with the minimum scale to test the circuit in the built-in self-testing of the tested circuit. According to the built-in self-testing method, 100% fault coverage rate of the built-in self-testing can be achieved, and the test time can be greatly shortened since the test set with the relatively small scale is used on the aspect of test time. Therefore, the test time is relatively short, and the built-in self-testing method provided by the invention can be used for effectively detecting whether the integrated circuit has fault or not.

Description

technical field [0001] The invention belongs to the field of integrated circuit testing, in particular to a built-in self-testing method and application of integrated circuits. Background technique [0002] In the process of designing and manufacturing integrated circuits, first of all, it is necessary to ensure that the design of the circuit conforms to the product function specifications defined in advance. Secondly, defects and errors in the production process of circuit chips may cause failures in some products. For such problems, The detection process performed is called circuit testing. [0003] In the early days of circuit testing, the testing process was often arranged after the chip design and manufacturing process. The test engineer formulates the product test plan by using the function and structure of the circuit and combining certain test algorithms. With the continuous increase of circuit integration and complexity, the external pins of the circuit are very l...

Claims

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Application Information

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IPC IPC(8): G01R31/28
Inventor 潘中良陈翎
Owner SOUTH CHINA NORMAL UNIVERSITY