FPGA program multi-image loading method based on ARM

Abstract

The invention relates to an FPGA (Field Programmable Gate Array) program multi-image loading method based on an ARM. The loading method comprises the following steps: 1, packing field-programmable gate array files with different signal formats in a computer through a field-programmable gate array compiler; 2, writing the packed field-programmable gate array files into a flash memory in the computer by an ARM processor via a serial peripheral interface; 3, writing external bus interface storage address information and corresponding external bus interface register addresses of the files demanded to be loaded into external bus interfaces by the ARM processor when demanding to load one of the packed field-programmable gate array files, and loading the necessary field-programmable gate array files into the random access memory of the field-programmable gate array chip from the flash memory by the field-programmable gate array chip. Fast switch and power down protection of display module test signals can be simultaneously realized by the loading method.

Description

technical field [0001] The invention relates to the field of FPGA embedded system technology and display module testing technology, in particular to an ARM-based FPGA program multi-image loading method. Background technique [0002] Depending on the application, the signals supported by the display module will also be different. At present, display modules generally support LVDS signal (Low Voltage Differential Signaling, low voltage differential signal), MIPI signal (Mobile Industry Processor Interface, mobile industry processor interface) or DP signal (Display Port, a digital video interface promoted by Video Electronics Standards Association) standard). When the display module test equipment based on FPGA (Field Programmable Gate Array, Field Programmable Gate Circuit) implements display modules compatible with lighting different signal interfaces, it often leads to insufficient use of FPGA chip resources. The existing solutions are as follows : [0003] 1) Compile the...

AI Technical Summary

Problems solved by technology

This method realizes the method of loading and running the FPGA program automatically. Although the running speed is improved and the original function will not be affected by power failure, the switching speed is also slow, and it still needs to be loaded to the FPGA chip through SPI. RAM or overwrite the original FPGA program

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