Intermediate triggering negative-pressure-resistant SCR (silicon controlled rectifier) device, technical method and application circuit

Abstract

The invention is suitable for the field of semiconductor devices, and provides an intermediate triggering negative-pressure-resistant SCR (silicon controlled rectifier) device, a technical method and an ESD (electro-static discharge) application circuit. The structure comprises a substructure, a first deep injection well formed in the substrate, a first active region formed in the first deep injection well, a second deep injection well formed in the substrate, a second active region formed in the second deep injection well, a first active region formed in the second deep injection well, a first well formed in the second deep injection well to form an intersection, a first active region formed by simultaneous injection into the two wells at the intersection between the first well and the second deep injection well, a second active region formed in the first well, and a first active region formed in the first well. According to the SCR device which can resist negative pressure and has intermediate triggering voltage, the triggering voltage of the SCR device can be reduced to be lower than the puncture voltage of a gate oxide layer in a chip, so that the effective design requirement on ESD protection is met.

Description

technical field [0001] The invention belongs to the field of semiconductor devices, and in particular relates to an SCR device, a process method and an ESD application circuit of a medium-trigger negative-voltage-resistant SCR device. Background technique [0002] Compared with other electrostatic protection (ESD) devices, silicon controlled rectifier (SCR) devices have higher protection performance per unit area due to their low holding voltage characteristics. [0003] figure 1 Shows the cross-sectional structure of an existing high trigger negative voltage withstand SCR device, the SCR device structure includes: a P-type substrate (PSUB) 1, a plurality of deep implanted P wells formed in the P-type substrate 1 by doping (DPWELL) 2, and the P+ active region (P+) 3 formed by doping in each deep implanted P well 2, the P type substrate 1 is grounded through the P+ active region 3 through the deep implanted P well 2; [0004] The SCR device structure also includes: a deep i...

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Problems solved by technology

[0010] The purpose of the embodiments of the present invention is to provide an SCR device with negative voltage resistance and medium trigger voltage, aiming to solve the problem that the trigger voltage of the existing SCR device is higher than the breakdown voltage of the internal gate oxide layer of the chip, and cannot achieve effective ESD protection.

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