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Double-chip flip chip structure

A double-chip, flip-chip packaging technology, applied in the direction of electrical components, electrical solid-state devices, circuits, etc., can solve the problems of high cost, unfavorable heat dissipation, etc., and achieve the effects of saving energy, reducing chip packaging area, and reducing costs

Inactive Publication Date: 2015-06-10
SHANGHAI RES INST OF MICROELECTRONICS SHRIME PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The current stackable flip crystal has been proposed, but this structure has many disadvantages, which is not conducive to heat dissipation, the consumption of materials has not been reduced, and the cost is also high

Method used

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  • Double-chip flip chip structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment

[0024] Embodiment: a double-chip flip-chip package package structure.

[0025] A double chip flip-chip packaging structure, refer to the attached figure 1 Shown: Including 1. Substrate 2. Chip 3. Heat sink 4. Conductive bump 5. Lead terminal 6. Central partition 7. Substrate top 8. Filler thermal conductive glue 9. Silver glue. It is characterized in that: the substrate 1 is made of insulating material and has a central partition 6, the chip 2 is placed in the slot formed by the central partition 6 and the top 7 of the substrate, and the lead terminal 5 passes through the depression of the 4 conductive bumps and the slope at the bottom of the slot. After melting, the electrical connection is made, and then the thermal conductive glue 8 is injected into the slot to cover the chip to protect the chip and transfer heat. The heat sink 3 is bonded to the central partition 6 and the top of the substrate 7 through silver glue 9 to form a double-chip flip-chip packaging structure.

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PUM

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Abstract

The invention provides a double-chip flip chip structure by taking a flip chip structure as a starting point. The double-chip flip chip structure is characterized in that a substrate with a central partition plate is provided with two chip slots in certain gradients, and a plurality of semispherical grooves are formed at contact positions of the slot slopes and chip conducting projections; each chip is provided with a plurality of cylindrical conducting projections with semispherical tops; an upper cooling fin is fastened to the top of the substrate. The double-chip flip chip structure has the advantages of realization of self-alignment chip bonding, realization of integral packaging of double chips, high integration level, reduction of chip packaging area and improvement of a heat radiation function.

Description

technical field [0001] The invention relates to the technical field of semiconductor device packaging, in particular to a double-chip flip-chip packaging structure. Background technique [0002] Flip Chip Interconnect Technology (Flip Chip Interconnect Technology), also known as "inverted chip packaging" or "inverted chip packaging method", is a kind of chip packaging technology. This packaging technology is to arrange the conductive bumps on the active surface of the chip, and flip chip bonding on the substrate, so that the chip can be electrically connected to the substrate through the conductive bumps, and electrically connected to the outside through the internal circuit of the substrate. electronic device. Flip-chip bonding technology is suitable for high-pin-count chip packaging structures, and has the advantages of reducing chip packaging area and shortening signal transmission paths. Flip-chip bonding technology has been widely used in the field of chip packaging. ...

Claims

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Application Information

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IPC IPC(8): H01L25/00H01L23/31H01L23/13H01L23/367
CPCH01L2224/16225H01L2924/15153H01L2924/15158
Inventor 李一男程玉华
Owner SHANGHAI RES INST OF MICROELECTRONICS SHRIME PEKING UNIV
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