A design method for converting pci bus to isa and apb bus

Abstract

The invention proposes a design method for converting a PCI bus into an ISA and an APB bus, and solves the problem that a processor in an embedded computer system cannot simultaneously access devices conforming to the ISA parallel bus protocol. The technical scheme that the present invention takes comprises: PCI bus interface 1 receives the PCI bus configuration instruction from PCI bus, sends described PCI bus configuration instruction to PCI instruction analysis control module 2; PCI instruction analysis control module 2 from PCI bus configuration instruction The register address and register storage address are resolved and sent to the PCI bus configuration register module 3; the PCI configuration register processing module 3 writes the register address into the PCI control register corresponding to the register storage address in the PCI bus configuration register module 3.

Description

technical field [0001] The present invention relates to the field of system-on-chip (System on Chip, "SoC") design, in particular to a bus interface conversion method. Background technique [0002] In a computer system, electronic chips and other components are interconnected by buses. Various components can be connected to a bus that enables communication between all devices connected to the bus. The various bus speeds in the computer are different, and the processor bus has a faster speed, which is used to connect faster peripherals such as processors and memories. The slower peripherals are attached to the processor bus bridge chip (also known as the North Bridge), which converts the high-speed processor bus into a lower-speed local bus. At present, the industry often uses the PCI bus as a local bus. [0003] However, these low-speed devices do not necessarily have PCI interfaces, and many device interfaces are ISA interfaces. This requires the design of an interface ...

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Problems solved by technology

[0005] The purpose of the present invention is to propose a design method for converting the PCI bus into an ISA and APB bus to solve the problem that the processor in the current embedded computer system cannot simultaneously access devices (such as asynchronous parallel memory) that conform to the ISA parallel bus protocol, and conform to the APB on-chip Problems with bus interface devices

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