Method of simulating real-time calibration of large time-delay analog source with high precision

Abstract

The invention provides a method of simulating the real-time calibration of a large time-delay analog source with high precision which is low in consumption and low in cost, and is incapable of influencing the normal operation of the large time-delay analogue source, so as to improve a method of improving the time delay precision as an objective. The method comprises the steps of adding data marks to idle bits in several bytes at the head part or the tail part of a database, and installing a special mark register to memorize a packet header mark, and marking delayed data; meanwhile, installing a counter which is synchronous with the frequency of a write block stored at the state; generating a reset pulse to the counter when the time delay set is updated, updating and marking a value of a shifting register and judging whether the value is equal to a value of a mark register, adding 1 to the value of the counter if the value of the shifting register is not equal to the mark register, and completing the time delay online measurement if the value of the counter is equal to the mark register; compensating a time delay error generated by fine time delay by virtue of changing a thick time delay memory terminating address at the coarse time delay state, and completing the real-time delay verification by changing the termination memory address.

Description

technical field [0001] The invention relates to a high-precision realization method of a large time-delay analog source based on asynchronous double-storage delay for ranging or positioning in the field of aerospace deep space measurement and control and radar system measurement. Background technique [0002] In aerospace deep space measurement and control systems and radar systems, long-delay analog sources are widely used for calibration or correction of ranging and positioning. The existing large-delay analog sources are realized through two types of technologies: digital chip delay technology and asynchronous dual-storage technology. The former has high requirements on the quality of the system clock, and it is not easy to make the resolution very small under the condition of large delay, so the application area is not large. The latter uses one slow and one fast asynchronous read and write clock to divide the storage delay into thick and thin, which solves the contradi...

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Problems solved by technology

[0003] The purpose of the present invention is to provide a low-consumption, low-cost analog source that does not affect the normal operation of the long-delay analog source for the above-mentioned prior art that is based on asynchronous dual storage technology. work, aiming at improving the delay accuracy

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