Charge pump device for phase locked loop clock data restorer

Abstract

The invention relates to a charge pump device for a phase locked loop clock data restorer. According to the charge pump, on the basis of the traditional charge pump, through adjusting a current relationship between a pull-up current source and a pull-down current source, a topological structure of the pull-down current source is changed, and current pull-up and pull-down channels can be multiplexed at the same time to have voltage follower functions, jitter of loop switching and charge sharing on an oscillator control voltage can be eliminated, and no extra voltage follower operational amplifier is needed. Control switches of the charge pump all adopts an MOS transistor of the same type for realization, and influences of switch mismatch on clock phase recovery can be eliminated. In addition, charging and discharging current of the charge pump is controlled by the oscillator control voltage, no extra reference source is needed, the charging and discharging current is dynamically changed along with the frequency of the oscillator, and thus the charge pump can be used for constructing an adaptive bandwidth path.

Description

technical field [0001] The invention relates to a charge pump device, in particular to a charge pump device for a phase-locked loop clock data restorer. Background technique [0002] The clock data restorer is widely used in the receiving end of the high-speed serial data transmission system, it recovers the correct sampling clock from the serial data, the application of the clock data restorer based on the phase locked loop (Phase locked loop, PLL) The most common, this type of clock data restorer consists of two loops: a frequency synthesis loop, a phase-locked loop, and a phase tracking loop. The working principle is to first generate an appropriate frequency and then perform phase tracking. For the architecture and application of the clock data recovery device, please refer to the article Architectures For Multi-gigabit Wire-linked Clock and Data Recovery published by Ming-ta Hsieh et al. on Circuits and Systems Magazine, a journal of the International Institute of Elect...

AI Technical Summary

Problems solved by technology

[0009] The system-on-chip will integrate ultra-large-scale digital modules and interface modules. The high-speed switching of the logic gates of the digital modules will introduce large noise on the power supply and ground, and the noise will introduce mismatch current between the charging and discharging current sources of the charge pump. Affecting Phase Tracking of Clock Data Recovery Systems

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