Multi-time program memory (MTP) device structure and manufacturing method thereof

Abstract

The present invention provides an MTP device structure and a manufacturing method thereof. The manufacturing method comprises the steps of providing a semiconductor substrate, and making a shallow channel isolating structure used for isolating a first well region and a second well region in the semiconductor substrate; forming an N well in the first well region by an N-type doping ion implantation technology; forming a P-region at the lower part of the second well region by a P-type doping ion implantation technology; forming an N region at the upper part of the second well region by an N-type doping ion implantation technology; forming a floating gate structure covering the N well, the shallow channel isolating structure and a part of the N region. According to the present invention, by manufacturing an original P well region into the second well region composed of the lower P region and the upper N region, an erasing voltage of an MTP device can be improved greatly, and the erasing speed of the MTP device can be improved greatly without needing to increase the volume of an erasing capacitor. The manufacturing method of the present invention is simple, and is suitable for the industrial production by being compatible with a CMOS technology.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof, in particular to an MTP device structure and a manufacturing method thereof. Background technique [0002] Multi-time programmable memory (Multi-Time Program Memory, MTP), compared with single-time programmable memory (one time program memory, OTP), has the ability to store, read, and erase data multiple times And other actions, and the advantages of the stored data will not disappear after power failure, has gradually become a memory device widely used in personal computers, electronic equipment, mobile storage and other fields. [0003] An existing MTP circuit structure such as figure 1 As shown, it includes a floating gate transistor 20 , a selection transistor 30 connected to the structure of the floating gate transistor, and an erasing capacitor 10 for controlling the erasing of charges in the floating gate transistor 20 . For MTP devices below 0.13 μm, a very hi...

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Problems solved by technology

[0008] In view of the above-mentioned shortcoming of prior art, the object of the present invention is to provide a kind of MTP device structure and manufacturing method thereof, be used to solve the problem that MTP device erasing speed is difficult to improve in the prior art

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