Digital/Analog Conversion

A technology of analog conversion and analog converter, which is applied in the directions of digital-to-analog converter, analog conversion, analog/digital conversion, etc., and can solve problems such as the limitation of the maximum oversampling ratio

Active Publication Date: 2018-05-18
CIRRUS LOGIC INT SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, in practice there is a limit to the maximum oversampling ratio that can be used due to MOS switch and amplifier characteristics

Method used

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  • Digital/Analog Conversion
  • Digital/Analog Conversion
  • Digital/Analog Conversion

Examples

Experimental program
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Embodiment Construction

[0046] In an embodiment of the invention, the digital-to-analog conversion circuit includes: a digital-to-analog converter (DAC) capable of operating at multiple clock rates; and a first clock controller for The amplitude controls the clock rate of the DAC. During operation, the first clock controller may change the clock of the DAC to change the noise characteristics of the conversion circuit. The first clock controller may vary the DAC clock rate such that the first signal magnitude produces a first DAC clock rate and the higher second signal magnitude produces a second, slower DAC clock rate.

[0047] Operating the conversion circuit at a faster clock rate has the advantage that the noise component can be spread over a wider frequency band and thus reduces the noise component in the frequency band of interest (usually the audio frequency band). However, because the DAC elements have less time to stabilize at faster clock rates, there are many practical limitations in the m...

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PUM

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Abstract

The present application relates to digital-to-analog conversion with improved noise performance. Embodiments relate to a digital-to-analog conversion circuit (300) for converting a digital audio signal to an analog audio signal, comprising a digital-to-analog converter (104) operable at multiple DAC clock rates. The first clock controller (301-1) controls the DAC clock rate based on the indication about the audio signal amplitude. For low-amplitude signals (where noise is significant) the DAC clock rate (CK1) can be increased to reduce the DAC's in-band thermal noise. At higher amplitudes, when noise is less audible, the DAC clock rate can be reduced to avoid distortion. The amplitude of the audio signal may be monitored by a digital level detector (302) or in some cases by an analog level detector (303). The DAC may be an oversampling DAC with an input interpolator (101). The conversion circuit may also include a word length reduction module (102) and a dynamic error matching module (103), whose clock rates may also vary based on the signal.

Description

technical field [0001] The present application relates to digital-to-analog conversion circuits, and in particular to switched capacitor DACs, especially oversampling DACs. Background technique [0002] Digital-to-analog converters (DACs) are known and used in a variety of applications. One specific application is within the audio signal processing path. Audio data is increasingly stored and transmitted in digital format. The digital audio data signal may then be converted within the audio signal path to an equivalent or representative analog audio data signal for driving, for example, an audio output transducer such as a speaker (e.g., a headphone / earphone speaker), or provided For analog line output (line-out) signal. Therefore, a DAC can be arranged in such an audio signal path to convert the digital data into a suitable analog format, which can then be amplified to provide the drive / output signal. [0003] Increasing demands on noise performance mean that in some app...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M3/00
CPCH03M3/50H03M3/374H03M1/0614H03M1/0663H03M1/08H03M1/66H04R3/00
Inventor J·P·莱索
Owner CIRRUS LOGIC INT SEMICON
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