Method for machining MEMS resonant structure

Abstract

The invention discloses a method for machining an MEMS resonant structure. The method includes: providing silicon wafer as substrate silicon, and growing a first mask layer on the surface of the substrate silicon; machining open patterns on the first mask layer; removing parts of the first mask layer and the substrate silicon which are corresponding to the open patterns by dry etching, and forming groove structures on the substrate silicon; growing second mask layers, forming the second mask layers on groove side walls of the groove structures and the groove bottoms, and forming a composite mask layer on the surface of the substrate silicon; removing the second mask layers by dry etching, and completely removing the second mask layers of the groove bottoms; etching the substrate silicon again by dry etching, enabling the groove structures to be deepened, and enabling newly etched groove side walls not to be covered by mask layers; by wet etching, enabling the inside of the substrate silicon to be communicated with the open pattern to form a cavity; depositing lower electrodes, piezoelectric function materials and upper electrodes; and patterning and releasing the resonant structure by dry etching.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for processing a MEMS resonant structure, in particular to a method for simultaneously manufacturing resonant structures with different silicon film thicknesses on the same wafer. Background technique [0002] MEMS oscillator refers to a programmable oscillator produced by the micro-electromechanical system. It is an upgrade of the traditional quartz crystal oscillator. The shockproof effect is 25 times that of the former. It is not affected by vibration and is not fragile. features. [0003] The processing of the MEMS resonant structure in the prior art has the following methods: [0004] 1. Use the SOI wafer to oxidize its surface and then bond it to another substrate wafer with a pre-processed cavity. After the SOI wafer is thinned, the upper metal lower electrode, piezoelectric functional material and metal upper electrode are deposited respecti...

AI Technical Summary

Problems solved by technology

[0006] The disadvantage of the above method is that: using SOI wafers, although the process is relatively simple, the cost of SOI wafers is very high

However, this special processing technology requires specific annealing equipment, including high temperature (generally greater than 1050°C) and special atmosphere (hydrogen or argon), which requires a large investment in fixed assets for chip foundries.

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