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Decoding method, memory storage device and memory control circuit unit

A technology of storage unit and decoding method, applied in the field of decoding, can solve problems such as data errors and inability to correct erroneous bits, and achieve the effect of increasing the correction ability

Active Publication Date: 2015-11-04
PHISON ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the correction capability of the error correction code has its upper limit, and the probability of data errors in the rewritable non-volatile memory module will change with the service life
Generally speaking, if the erasing times of a physical erasing unit in a rewritable non-volatile memory module increases, the probability of data error will also increase, which may lead to the situation that the error bit cannot be corrected

Method used

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  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit
  • Decoding method, memory storage device and memory control circuit unit

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Embodiment Construction

[0097] Generally speaking, a memory storage device (also called a memory storage system) includes a rewritable non-volatile memory module and a controller (also called a control circuit). Typically memory storage devices are used with a host system such that the host system can write data to or read data from the memory storage device.

[0098] figure 1 It is a schematic diagram of a host system and a memory storage device according to an exemplary embodiment. figure 2 It is a schematic diagram of a computer, an input / output device and a memory storage device according to an exemplary embodiment.

[0099] Please refer to figure 1 , the host system 1000 generally includes a computer 1100 and an input / output (I / O) device 1106 . The computer 1100 includes a microprocessor 1102 , a random access memory (random access memory, RAM) 1104 , a system bus 1108 and a data transmission interface 1110 . The input / output device 1106 includes such as figure 2 mouse 1202, keyboard 1204...

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Abstract

The invention provides a decoding method, a memory storage device and a memory control circuit unit. The decoding method comprises the following steps: sending a reading order sequence, wherein the reading order sequence is used for reading memory units to obtain a plurality of first verification bits; according to the first verification bits, executing a first decoding program, and judging whether a first effective code word is generated or not; if no first effective code words are generated, sending another reading instruction sequence to obtain a plurality of second verification bits; according to the second verification bits, calculating a total number of the memory units which meet a specific condition; according to the total number, obtaining channel reliability information; and according to the channel reliability information, executing a second decoding program. Therefore, decoding correction capability is improved.

Description

technical field [0001] The present invention relates to a decoding method, and in particular to a decoding method of a rewritable non-volatile memory module, a memory storage device and a memory control circuit unit. Background technique [0002] Digital cameras, mobile phones, and MP3 players have grown rapidly in recent years, making consumers' demand for storage media also increase rapidly. Since the rewritable non-volatile memory module (for example, flash memory) has the characteristics of data non-volatility, power saving, small size, and no mechanical structure, it is very suitable for being built in various portable devices such as the above examples. in multimedia devices. [0003] Generally, data written to the rewritable non-volatile memory module is encoded according to an error correction code. The data read from the rewritable non-volatile memory module also undergoes a corresponding decoding procedure. However, the correction ability of the error correction...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10
Inventor 林纬严绍维林玉祥王天庆赖国欣林小东
Owner PHISON ELECTRONICS
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