A design method of asynchronous sequential circuit based on ams

A technology of asynchronous sequential circuit and design method, which is applied in computing, electrical digital data processing, special data processing applications, etc., can solve the problems of interface circuit design difficulties and inability to optimize the circuit as a whole, so as to facilitate design optimization, reduce simulation time and Difficulty, the effect of solving compatibility problems

Inactive Publication Date: 2018-03-20
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

This type of method can realize large-scale asynchronous circuit design, but due to compatibility problems between synchronous and asynchronous design software, there are certain difficulties in interface circuit design, and it is impossible to effectively optimize the overall circuit

Method used

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  • A design method of asynchronous sequential circuit based on ams
  • A design method of asynchronous sequential circuit based on ams
  • A design method of asynchronous sequential circuit based on ams

Examples

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Embodiment

[0020] Taking the 32-bit asynchronous multiplier as an example, this design method is introduced in detail. It should be pointed out that the simulation tools called by the AMS simulation platform built by this method are: the transistor-level circuit simulation tool Nano Sim and the behavior-level and gate-level circuit simulation tool VCS. The simulation platform can simulate transistor-level circuits and behaviors and gate-level circuits at the same time, and generate analog waveforms and digital waveform files, as well as overall power consumption files.

[0021] The multiplier used in this example adopts Booth coding, completes the addition of partial products through the Wallace tree, and finally obtains the operation result. The multiplication structure can make good use of pipeline control data flow. At the same time, the asynchronous communication protocol selected in this example is a four-phase monorail bundled data protocol, and its design process is as follows ...

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Abstract

The invention belongs to the technical field of digital circuits, and in particular relates to an AMS-based asynchronous sequential circuit design method. The method of the present invention mainly includes determining the overall structure of the designed asynchronous sequential circuit; dividing it into two parts, the control path and the data path according to the characteristics of the asynchronous sequential circuit; In the traditional synchronous sequential circuit design process, the data path design is completed by establishing a virtual clock; using the built AMS simulation platform, the control path and data path are simulated and verified, and the structure of the overall circuit is obtained. The beneficial effect of the present invention is that, based on the design idea of ​​desynchronization, the present invention solves the problem of compatibility with synchronous sequential circuit design by effectively dividing the data path and the control path of the overall system, greatly reducing the simulation time and difficulty, It is more conducive to the realization of VLSI design.

Description

technical field [0001] The invention belongs to the technical field of digital circuits, and in particular relates to an AMS-based asynchronous sequential circuit design method. Background technique [0002] At present, the mainstream digital circuit design adopts the synchronous sequential circuit design process and method. As the process line width enters the deep submicron or even nanometer level, the chip power supply voltage continues to decrease, and the synchronous sequential circuit faces a series of unavoidable problems, such as: the proportion of leakage power consumption in the total power consumption of the circuit is increasing, IR drop leads to functional errors, poor circuit robustness, etc. Due to its structural characteristics, asynchronous sequential circuits naturally have the advantages of low power consumption, low IR drop, and high robustness that synchronous circuits do not have. Problems faced by the process. Synchronous and asynchronous sequential...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 贺雅娟万立马斌邢彦甄少伟罗萍张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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