Fabrication method of super-junction depth groove

Abstract

The invention discloses a fabrication method of a super-junction depth groove. The fabrication method comprises the following steps of: forming a hard mask layer on an N-type silicon substrate; carrying out a photoetching process to define a forming region of the super-junction depth groove; etching the hard mask layer; and etching silicon on the forming region of the super-junction depth groove to form the super-junction depth groove. According to the fabrication method, the in-plane uniformity of the super-junction depth groove is improved by setting etching process conditions of the super-junction depth groove, and by adjusting power of a radio frequency (RF) source to be 400-600W and setting gas flow rate of SF6 and O2 to be more than 2:1 so as to improve the in-plane uniformity of the super-junction depth groove. Through the fabrication method, the uniformity of a depth surface of the depth groove can be improved, and thus, the in-plane uniformity of breakdown voltage of a device is improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a super junction deep trench. Background technique [0002] MOS devices with a superjunction structure, due to their special structure, have the advantages of low on-resistance, high voltage resistance, and low heat generation, so they are also called coolMOS devices. One of the methods to realize the super junction structure is to etch deep trenches on the n-type silicon substrate first, and then fill the p-type silicon at one time by epitaxy (EPI). This method is relatively low in cost, but the process is difficult. Among them, the in-plane depth uniformity of the deep groove is relatively poor. The in-plane depth uniformity of the deep groove formed by the existing method is about 2.8 microns, and the deterioration of the in-plane depth uniformity will lead to uniform breakdown voltage (BV) in the plane. The in-plane d...

AI Technical Summary

Problems solved by technology

One of the methods to realize the super junction structure is to etch deep trenches on the N-type silicon substrate first, and then fill the p-type silicon at one time by epitaxy (EPI). This method is relatively low in cost, but the process is difficult.

Among them, the in-plane depth uniformity of the deep groove is relatively poor. The in-plane depth uniformity of the deep groove formed by the existing method is about 2.8 microns, and the deterioration of the in-plane depth uniformity will lead to uniform breakdown voltage (BV) in the plane. The in-plane depth uniformity of coolMOS devices with deep trenches formed by existing methods is about 150V to 200V

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