Integrated circuit

Abstract

An integrated circuit (IC) is provided. The IC includes a chip, a passivation layer, a first metal internal connection, a routing wire and a bonding area. The passivation layer is disposed on the chip, wherein the passivation layer has a first opening. The first metal internal connection is disposed under the passivation layer and disposed in the chip. The routing wire is disposed on the passivation layer, wherein a first end of the routing wire electrically connects to a first end of the first metal internal connection through the first opening of the passivation layer. The bonding area is disposed on the passivation layer, wherein the bonding area electrically connects to a second end of the routing wire.

Description

technical field [0001] The present invention relates to an integrated circuit. Background technique [0002] The longer the width (or length) of a chip, the longer its metal interconnection (metalline). For example, the high-resolution power driver chip of the liquid crystal display panel often suffers from a voltage drop problem inside the chip because of its long and narrow layout, which makes the length of the metal interconnection too long. The longer the length of the metal interconnection in the chip, the greater its resistance value, resulting in more obvious voltage drop problem. Pressure drop problems will result in slower operating speeds. The traditional solution is usually to add vias (Via) and metal layers (Metallayer) into the chip during the chip manufacturing process to reduce the internal impedance of the electrical path (such as the system voltage VDD or the ground voltage VSS). However, changing the internal circuit layout of a chip means modifying mult...

AI Technical Summary

Problems solved by technology

However, changing the internal circuit layout of a chip means modifying multiple chip processing masks, which is expensive

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