Eu and nano Au containing interconnection material for 3D chip stacking

Abstract

The invention discloses a Eu and nano Au containing interconnection material for 3D chip stacking, and belongs to the field of chip interconnection materials. The interconnection material comprises 0.01%-0.5% of the rare earth Eu element, 5%-8% of nano Au particles and the balance In. Firstly, intermediate ally powder of In-Eu is prepared, secondly, In-Eu powder, In powder, rosin resin, a thixotropic agent, a stabilizing agent, an active assistant agent and an active agent are mixed and sufficiently stirred, finally, nano Au particles are added, sufficient stirring is carried out, and the pasty interconnection material containing Eu and the nano Au particles is prepared. By means of the precise silk-screen printing and reflux welding technology, protruding points are prepared on the surfaces of chips, vertical chip interconnection in the three-dimensional space is achieved under a certain pressure of 1MPa-10MPa and a certain temperature of 170 DEG C-260 DEG C, and high-strength interconnection welding points are formed. The interconnection material has high reliability and can be used for three-dimensional packaging chip stacking.

Description

technical field [0001] The invention relates to a 3D chip stacked interconnect material containing Eu and nano-Au, belonging to the field of chip interconnect materials. The interconnection material is mainly used in the field of three-dimensional packaging with high reliability requirements, and is a new type of interconnection material with high performance. Background technique [0002] With the gradual improvement of microelectronic packaging technology requirements in the fields of computers, communications, automobiles, electronics and aviation, and the development of electronic devices in the direction of miniaturization, multi-function and low cost, traditional two-dimensional packaging is difficult to meet the development of high integration of a single chip trend. The emergence of three-dimensional packaging chip stacking technology can make the size of electronic devices miniaturized and more functional. Three-dimensional packaging, that is, chips are stacked la...

AI Technical Summary

Problems solved by technology

Because for intermetallic compounds, the low reliability during service has become the main problem restricting its development, which also limits its application in three-dimensional packaging chip stacking. How to improve the reliability of intermetallic compound solder joints in three-dimensional packaging structures has become an Important Issues in the Packaging Field

The reliability of three-dimensional packaging structures can be significantly improved by studying new interconnect materials, but there are relatively few research reports on this aspect

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